[PATCH 1/2] drm/amdgpu: Add pci revision id

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Change-Id: I304ea635d0bfddecc4ae44f22e73166bad2d6f86
Signed-off-by: Ken Wang <Qingqing.Wang at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h |  1 +
 drivers/gpu/drm/amd/amdgpu/vi.c     | 20 ++++++++++++++++++++
 2 files changed, 21 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index a464456..bd94f50 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1988,6 +1988,7 @@ struct amdgpu_device {
 	uint32_t			family;
 	uint32_t			rev_id;
 	uint32_t			external_rev_id;
+	uint32_t			pci_rev_id;
 	unsigned long			flags;
 	int				usec_timeout;
 	const struct amdgpu_asic_funcs	*asic_funcs;
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c
index c628a09..f37f818 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -1456,6 +1456,25 @@ static uint32_t vi_get_rev_id(struct amdgpu_device *adev)
 			>> PCIE_EFUSE4__STRAP_BIF_ATI_REV_ID__SHIFT;
 }
 
+static uint32_t vi_get_pci_rev_id(struct amdgpu_device *adev)
+{
+	uint32_t pci_rev_id = 0;
+	uint32_t major, minor;
+
+	if (adev->flags & AMD_IS_APU)
+		return 0;
+
+	major = (RREG32(mmPCIE_EFUSE4) & PCIE_EFUSE4__STRAP_BIF_F0_MAJOR_REV_ID_MASK)
+			>> PCIE_EFUSE4__STRAP_BIF_F0_MAJOR_REV_ID__SHIFT;
+
+	minor = (RREG32(mmPCIE_EFUSE4) & PCIE_EFUSE4__STRAP_BIF_F0_MINOR_REV_ID_MASK)
+			>> PCIE_EFUSE4__STRAP_BIF_F0_MINOR_REV_ID__SHIFT;
+
+	pci_rev_id = ((major & 0xf) << 4) | (minor & 0xf);
+
+	return pci_rev_id;
+}
+
 static const struct amdgpu_asic_funcs vi_asic_funcs =
 {
 	.read_disabled_bios = &vi_read_disabled_bios,
@@ -1495,6 +1514,7 @@ static int vi_common_early_init(void *handle)
 		smc_enabled = true;
 
 	adev->rev_id = vi_get_rev_id(adev);
+	adev->pci_rev_id = vi_get_pci_rev_id(adev);
 	adev->external_rev_id = 0xFF;
 	switch (adev->asic_type) {
 	case CHIP_TOPAZ:
-- 
2.7.4



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