RAVEN has multiple I2S instances:BT and SP.But only BT is enabled.
Now I2S SP instance also gets enabled with this patch.
Signed-off-by: Ravulapati Vishnu vardhan rao <Vishnuvardhanrao.Ravulapati@xxxxxxx>
Reviewed-by: Vijendar Mukunda <vijendar.mukunda@xxxxxxx>
---
sound/soc/amd/raven/acp3x-i2s.c | 216 +++++++++++++++++-------
sound/soc/amd/raven/acp3x-pcm-dma.c | 321 ++++++++++++++++++++++++------------
sound/soc/amd/raven/acp3x.h | 105 +++++++++---
3 files changed, 461 insertions(+), 181 deletions(-)
diff --git a/sound/soc/amd/raven/acp3x-i2s.c b/sound/soc/amd/raven/acp3x-i2s.c
index 7420928..9467c1d 100644
--- a/sound/soc/amd/raven/acp3x-i2s.c
+++ b/sound/soc/amd/raven/acp3x-i2s.c
@@ -19,24 +19,6 @@
#define DRV_NAME "acp3x-i2s"
-static u64 acp_get_byte_count(struct i2s_stream_instance *rtd, int direction)
-{
- u64 byte_count;
-
- if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
- byte_count = rv_readl(rtd->acp3x_base +
- mmACP_BT_TX_LINEARPOSITIONCNTR_HIGH);
- byte_count |= rv_readl(rtd->acp3x_base +
- mmACP_BT_TX_LINEARPOSITIONCNTR_LOW);
- } else {
- byte_count = rv_readl(rtd->acp3x_base +
- mmACP_BT_RX_LINEARPOSITIONCNTR_HIGH);
- byte_count |= rv_readl(rtd->acp3x_base +
- mmACP_BT_RX_LINEARPOSITIONCNTR_LOW);
- }
- return byte_count;
-}
-
static int acp3x_i2s_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
{
@@ -46,10 +28,10 @@ static int acp3x_i2s_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
case SND_SOC_DAIFMT_I2S:
adata->tdm_mode = false;
- break;
+ break;
case SND_SOC_DAIFMT_DSP_A:
- adata->tdm_mode = true;
- break;
+ adata->tdm_mode = true;
+ break;
default:
return -EINVAL;
}
@@ -68,16 +50,16 @@ static int acp3x_i2s_set_tdm_slot(struct snd_soc_dai *cpu_dai, u32 tx_mask,
switch (slot_width) {
case SLOT_WIDTH_8:
slot_len = 8;
- break;
+ break;
case SLOT_WIDTH_16:
slot_len = 16;
- break;
+ break;
case SLOT_WIDTH_24:
slot_len = 24;
- break;
+ break;
case SLOT_WIDTH_32:
slot_len = 0;
- break;
+ break;
default:
return -EINVAL;
}
@@ -87,9 +69,16 @@ static int acp3x_i2s_set_tdm_slot(struct snd_soc_dai *cpu_dai, u32 tx_mask,
val = rv_readl(adata->acp3x_base + mmACP_BTTDM_IRER);
rv_writel((val | 0x2), adata->acp3x_base + mmACP_BTTDM_IRER);
+ val = rv_readl(adata->acp3x_base + mmACP_I2STDM_ITER);
+ rv_writel((val | 0x2), adata->acp3x_base + mmACP_I2STDM_ITER);
+ val = rv_readl(adata->acp3x_base + mmACP_I2STDM_IRER);
+ rv_writel((val | 0x2), adata->acp3x_base + mmACP_I2STDM_IRER);
+
val = (FRM_LEN | (slots << 15) | (slot_len << 18));
rv_writel(val, adata->acp3x_base + mmACP_BTTDM_TXFRMT);
rv_writel(val, adata->acp3x_base + mmACP_BTTDM_RXFRMT);
+ rv_writel(val, adata->acp3x_base + mmACP_I2STDM_TXFRMT);
+ rv_writel(val, adata->acp3x_base + mmACP_I2STDM_RXFRMT);
adata->tdm_fmt = val;
return 0;
@@ -100,31 +89,62 @@ static int acp3x_i2s_hwparams(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
u32 val = 0;
+ struct snd_soc_pcm_runtime *prtd = substream->private_data;
+ struct snd_soc_card *card = prtd->card;
+ struct acp3x_platform_info *pinfo = snd_soc_card_get_drvdata(card);
struct i2s_stream_instance *rtd = substream->runtime->private_data;
+ if (pinfo) {
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ rtd->i2s_instance = pinfo->play_i2s_instance;
+ else
+ rtd->i2s_instance = pinfo->cap_i2s_instance;
+ }
+
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_U8:
case SNDRV_PCM_FORMAT_S8:
rtd->xfer_resolution = 0x0;
- break;
+ break;
case SNDRV_PCM_FORMAT_S16_LE:
rtd->xfer_resolution = 0x02;
- break;
+ break;
case SNDRV_PCM_FORMAT_S24_LE:
rtd->xfer_resolution = 0x04;
- break;
+ break;
case SNDRV_PCM_FORMAT_S32_LE:
rtd->xfer_resolution = 0x05;
- break;
+ break;
default:
return -EINVAL;
}
- val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER);
- val = val | (rtd->xfer_resolution << 3);
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
- rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_ITER);
- else
- rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_IRER);
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ switch (rtd->i2s_instance) {
+ case I2S_BT_INSTANCE:
+ val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER);
+ val = val | (rtd->xfer_resolution << 3);
+ rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_ITER);
+ break;
+ case I2S_SP_INSTANCE:
+ default:
+ val = rv_readl(rtd->acp3x_base + mmACP_I2STDM_ITER);
+ val = val | (rtd->xfer_resolution << 3);
+ rv_writel(val, rtd->acp3x_base + mmACP_I2STDM_ITER);
+ }
+ } else {
+ switch (rtd->i2s_instance) {
+ case I2S_BT_INSTANCE:
+ val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_IRER);
+ val = val | (rtd->xfer_resolution << 3);
+ rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_IRER);
+ break;
+ case I2S_SP_INSTANCE:
+ default:
+ val = rv_readl(rtd->acp3x_base + mmACP_I2STDM_IRER);
+ val = val | (rtd->xfer_resolution << 3);
+ rv_writel(val, rtd->acp3x_base + mmACP_I2STDM_IRER);
+ }
+ }
return 0;
}
@@ -132,9 +152,19 @@ static int acp3x_i2s_hwparams(struct snd_pcm_substream *substream,
static int acp3x_i2s_trigger(struct snd_pcm_substream *substream,
int cmd, struct snd_soc_dai *dai)
{
+ u32 val, period_bytes;
int ret = 0;
struct i2s_stream_instance *rtd = substream->runtime->private_data;
- u32 val, period_bytes;
+ struct snd_soc_pcm_runtime *prtd = substream->private_data;
+ struct snd_soc_card *card = prtd->card;
+ struct acp3x_platform_info *pinfo = snd_soc_card_get_drvdata(card);
+
+ if (pinfo) {
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ rtd->i2s_instance = pinfo->play_i2s_instance;
+ else
+ rtd->i2s_instance = pinfo->cap_i2s_instance;
+ }
period_bytes = frames_to_bytes(substream->runtime,
substream->runtime->period_size);
@@ -142,37 +172,107 @@ static int acp3x_i2s_trigger(struct snd_pcm_substream *substream,
case SNDRV_PCM_TRIGGER_START:
case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
- rtd->bytescount = acp_get_byte_count(rtd,
- substream->stream);
+ rtd->bytescount = acp_get_byte_count(rtd, substream->stream);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- rv_writel(period_bytes, rtd->acp3x_base +
+ switch (rtd->i2s_instance) {
+ case I2S_BT_INSTANCE:
+ rv_writel(period_bytes, rtd->acp3x_base +
mmACP_BT_TX_INTR_WATERMARK_SIZE);
- val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER);
- val = val | BIT(0);
- rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_ITER);
+ val = rv_readl(rtd->acp3x_base +
+ mmACP_BTTDM_ITER);
+ val = val | BIT(0);
+ rv_writel(val, rtd->acp3x_base +
+ mmACP_BTTDM_ITER);
+ rv_writel(1, rtd->acp3x_base +
+ mmACP_BTTDM_IER);
+ break;
+ case I2S_SP_INSTANCE:
+ default:
+ rv_writel(period_bytes, rtd->acp3x_base +
+ mmACP_I2S_TX_INTR_WATERMARK_SIZE);
+ val = rv_readl(rtd->acp3x_base +
+ mmACP_I2STDM_ITER);
+ val = val | BIT(0);
+ rv_writel(val, rtd->acp3x_base +
+ mmACP_I2STDM_ITER);
+ rv_writel(1, rtd->acp3x_base +
+ mmACP_I2STDM_IER);
+ }
} else {
- rv_writel(period_bytes, rtd->acp3x_base +
+ switch (rtd->i2s_instance) {
+ case I2S_BT_INSTANCE:
+ rv_writel(period_bytes, rtd->acp3x_base +
mmACP_BT_RX_INTR_WATERMARK_SIZE);
- val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_IRER);
- val = val | BIT(0);
- rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_IRER);
+ val = rv_readl(rtd->acp3x_base +
+ mmACP_BTTDM_IRER);
+ val = val | BIT(0);
+ rv_writel(val, rtd->acp3x_base +
+ mmACP_BTTDM_IRER);
+ rv_writel(1, rtd->acp3x_base +
+ mmACP_BTTDM_IER);
+ break;
+ case I2S_SP_INSTANCE:
+ default:
+ rv_writel(period_bytes, rtd->acp3x_base +
+ mmACP_I2S_RX_INTR_WATERMARK_SIZE);
+ val = rv_readl(rtd->acp3x_base +
+ mmACP_I2STDM_IRER);
+ val = val | BIT(0);
+ rv_writel(val, rtd->acp3x_base +
+ mmACP_I2STDM_IRER);
+ rv_writel(1, rtd->acp3x_base +
+ mmACP_I2STDM_IER);
+ }
}
- rv_writel(1, rtd->acp3x_base + mmACP_BTTDM_IER);
- break;
+ break;
case SNDRV_PCM_TRIGGER_STOP:
case SNDRV_PCM_TRIGGER_SUSPEND:
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
- val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_ITER);
- val = val & ~BIT(0);
- rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_ITER);
+ switch (rtd->i2s_instance) {
+ case I2S_BT_INSTANCE:
+ val = rv_readl(rtd->acp3x_base +
+ mmACP_BTTDM_ITER);
+ val = val & ~BIT(0);
+ rv_writel(val, rtd->acp3x_base +
+ mmACP_BTTDM_ITER);
+ rv_writel(0, rtd->acp3x_base +
+ mmACP_BTTDM_IER);
+ break;
+ case I2S_SP_INSTANCE:
+ default:
+ val = rv_readl(rtd->acp3x_base +
+ mmACP_I2STDM_ITER);
+ val = val & ~BIT(0);
+ rv_writel(val, rtd->acp3x_base +
+ mmACP_I2STDM_ITER);
+ rv_writel(0, rtd->acp3x_base +
+ mmACP_I2STDM_IER);
+ }
+
} else {
- val = rv_readl(rtd->acp3x_base + mmACP_BTTDM_IRER);
- val = val & ~BIT(0);
- rv_writel(val, rtd->acp3x_base + mmACP_BTTDM_IRER);
+ switch (rtd->i2s_instance) {
+ case I2S_BT_INSTANCE:
+ val = rv_readl(rtd->acp3x_base +
+ mmACP_BTTDM_IRER);
+ val = val & ~BIT(0);
+ rv_writel(val, rtd->acp3x_base +
+ mmACP_BTTDM_IRER);
+ rv_writel(0, rtd->acp3x_base +
+ mmACP_BTTDM_IER);
+ break;
+ case I2S_SP_INSTANCE:
+ default:
+ val = rv_readl(rtd->acp3x_base +
+ mmACP_I2STDM_IRER);
+ val = val & ~BIT(0);
+ rv_writel(val, rtd->acp3x_base +
+ mmACP_I2STDM_IRER);
+ rv_writel(0, rtd->acp3x_base +
+ mmACP_I2STDM_IER);
+ }
}
- rv_writel(0, rtd->acp3x_base + mmACP_BTTDM_IER);
- break;
+ break;
default:
ret = -EINVAL;
break;
@@ -200,7 +300,7 @@ static struct snd_soc_dai_driver acp3x_i2s_dai = {
SNDRV_PCM_FMTBIT_S24_LE |
SNDRV_PCM_FMTBIT_S32_LE,
.channels_min = 2,
- .channels_max = 8,
+ .channels_max = 2,
.rate_min = 8000,
.rate_max = 96000,
@@ -249,6 +349,8 @@ static int acp3x_dai_probe(struct platform_device *pdev)
adata->i2s_irq = res->start;
adata->play_stream = NULL;
adata->capture_stream = NULL;
+ adata->i2ssp_play_stream = NULL;
+ adata->i2ssp_capture_stream = NULL;
dev_set_drvdata(&pdev->dev, adata);
status = devm_snd_soc_register_component(&pdev->dev,
diff --git a/sound/soc/amd/raven/acp3x-pcm-dma.c b/sound/soc/amd/raven/acp3x-pcm-dma.c
index 67160b5..bc90fa0 100644
--- a/sound/soc/amd/raven/acp3x-pcm-dma.c
+++ b/sound/soc/amd/raven/acp3x-pcm-dma.c
@@ -15,23 +15,22 @@
#include <sound/soc-dai.h>
#include "acp3x.h"
-
#define DRV_NAME "acp3x-i2s-audio"
-
static const struct snd_pcm_hardware acp3x_pcm_hardware_playback = {
.info = SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_BATCH |
SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
- SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
- SNDRV_PCM_FMTBIT_S32_LE,
+ SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S32_LE,
.channels_min = 2,
.channels_max = 8,
.rates = SNDRV_PCM_RATE_8000_96000,
.rate_min = 8000,
.rate_max = 96000,
- .buffer_bytes_max = PLAYBACK_MAX_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE,
+ .buffer_bytes_max = PLAYBACK_MAX_NUM_PERIODS *
+ PLAYBACK_MAX_PERIOD_SIZE,
.period_bytes_min = PLAYBACK_MIN_PERIOD_SIZE,
.period_bytes_max = PLAYBACK_MAX_PERIOD_SIZE,
.periods_min = PLAYBACK_MIN_NUM_PERIODS,
@@ -42,16 +41,17 @@ static const struct snd_pcm_hardware acp3x_pcm_hardware_capture = {
.info = SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_BATCH |
- SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
+ SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
- SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
- SNDRV_PCM_FMTBIT_S32_LE,
+ SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
+ SNDRV_PCM_FMTBIT_S32_LE,
.channels_min = 2,
.channels_max = 2,
.rates = SNDRV_PCM_RATE_8000_48000,
.rate_min = 8000,
.rate_max = 48000,
- .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE,
+ .buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS *
+ CAPTURE_MAX_PERIOD_SIZE,
.period_bytes_min = CAPTURE_MIN_PERIOD_SIZE,
.period_bytes_max = CAPTURE_MAX_PERIOD_SIZE,
.periods_min = CAPTURE_MIN_NUM_PERIODS,
@@ -96,7 +96,7 @@ static int acp3x_reset(void __iomem *acp3x_base)
while (true) {
val = rv_readl(acp3x_base + mmACP_SOFT_RESET);
if ((val & ACP3x_SOFT_RESET__SoftResetAudDone_MASK) ||
- timeout > 100) {
+ timeout > 100) {
if (val & ACP3x_SOFT_RESET__SoftResetAudDone_MASK)
break;
return -ENODEV;
@@ -170,19 +170,35 @@ static irqreturn_t i2s_irq_handler(int irq, void *dev_id)
play_flag = 0;
cap_flag = 0;
val = rv_readl(rv_i2s_data->acp3x_base + mmACP_EXTERNAL_INTR_STAT);
- if ((val & BIT(BT_TX_THRESHOLD)) && rv_i2s_data->play_stream) {
- rv_writel(BIT(BT_TX_THRESHOLD), rv_i2s_data->acp3x_base +
- mmACP_EXTERNAL_INTR_STAT);
+ if ((val & BIT(BT_TX_THRESHOLD)) &&
+ rv_i2s_data->play_stream) {
+ rv_writel(BIT(BT_TX_THRESHOLD), rv_i2s_data->acp3x_base
+ + mmACP_EXTERNAL_INTR_STAT);
snd_pcm_period_elapsed(rv_i2s_data->play_stream);
play_flag = 1;
}
+ if ((val & BIT(I2S_TX_THRESHOLD)) &&
+ rv_i2s_data->i2ssp_play_stream) {
+ rv_writel(BIT(I2S_TX_THRESHOLD),
+ rv_i2s_data->acp3x_base + mmACP_EXTERNAL_INTR_STAT);
+ snd_pcm_period_elapsed(rv_i2s_data->i2ssp_play_stream);
+ play_flag = 1;
+ }
- if ((val & BIT(BT_RX_THRESHOLD)) && rv_i2s_data->capture_stream) {
- rv_writel(BIT(BT_RX_THRESHOLD), rv_i2s_data->acp3x_base +
- mmACP_EXTERNAL_INTR_STAT);
+ if ((val & BIT(BT_RX_THRESHOLD)) &&
+ rv_i2s_data->capture_stream) {
+ rv_writel(BIT(BT_RX_THRESHOLD),
+ rv_i2s_data->acp3x_base + mmACP_EXTERNAL_INTR_STAT);
snd_pcm_period_elapsed(rv_i2s_data->capture_stream);
cap_flag = 1;
}
+ if ((val & BIT(I2S_RX_THRESHOLD)) &&
+ rv_i2s_data->i2ssp_capture_stream) {
+ rv_writel(BIT(I2S_RX_THRESHOLD),
+ rv_i2s_data->acp3x_base + mmACP_EXTERNAL_INTR_STAT);
+ snd_pcm_period_elapsed(rv_i2s_data->i2ssp_capture_stream);
+ cap_flag = 1;
+ }
if (play_flag | cap_flag)
return IRQ_HANDLED;
@@ -193,20 +209,35 @@ static irqreturn_t i2s_irq_handler(int irq, void *dev_id)
static void config_acp3x_dma(struct i2s_stream_instance *rtd, int direction)
{
u16 page_idx;
- u32 low, high, val, acp_fifo_addr;
- dma_addr_t addr = rtd->dma_addr;
+ uint64_t low, high, val, acp_fifo_addr;
+ dma_addr_t addr;
- /* 8 scratch registers used to map one 64 bit address */
- if (direction == SNDRV_PCM_STREAM_PLAYBACK)
- val = 0;
- else
- val = rtd->num_pages * 8;
+ addr = rtd->dma_addr;
+ if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
+ switch (rtd->i2s_instance) {
+ case I2S_BT_INSTANCE:
+ val = ACP_SRAM_BT_PB_PTE_OFFSET;
+ break;
+ case I2S_SP_INSTANCE:
+ default:
+ val = ACP_SRAM_SP_PB_PTE_OFFSET;
+ }
+ } else {
+ switch (rtd->i2s_instance) {
+ case I2S_BT_INSTANCE:
+ val = ACP_SRAM_BT_CP_PTE_OFFSET;
+ break;
+ case I2S_SP_INSTANCE:
+ default:
+ val = ACP_SRAM_SP_CP_PTE_OFFSET;
+ }
+ }
/* Group Enable */
rv_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp3x_base +
- mmACPAXI2AXI_ATU_BASE_ADDR_GRP_1);
+ mmACPAXI2AXI_ATU_BASE_ADDR_GRP_1);
rv_writel(PAGE_SIZE_4K_ENABLE, rtd->acp3x_base +
- mmACPAXI2AXI_ATU_PAGE_SIZE_GRP_1);
+ mmACPAXI2AXI_ATU_PAGE_SIZE_GRP_1);
for (page_idx = 0; page_idx < rtd->num_pages; page_idx++) {
/* Load the low address of page int ACP SRAM through SRBM */
@@ -223,38 +254,95 @@ static void config_acp3x_dma(struct i2s_stream_instance *rtd, int direction)
}
if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
- /* Config ringbuffer */
- rv_writel(MEM_WINDOW_START, rtd->acp3x_base +
- mmACP_BT_TX_RINGBUFADDR);
- rv_writel(MAX_BUFFER, rtd->acp3x_base +
- mmACP_BT_TX_RINGBUFSIZE);
- rv_writel(DMA_SIZE, rtd->acp3x_base + mmACP_BT_TX_DMA_SIZE);
-
- /* Config audio fifo */
- acp_fifo_addr = ACP_SRAM_PTE_OFFSET + (rtd->num_pages * 8)
- + PLAYBACK_FIFO_ADDR_OFFSET;
- rv_writel(acp_fifo_addr, rtd->acp3x_base +
- mmACP_BT_TX_FIFOADDR);
- rv_writel(FIFO_SIZE, rtd->acp3x_base + mmACP_BT_TX_FIFOSIZE);
+ switch (rtd->i2s_instance) {
+ case I2S_BT_INSTANCE:
+ /* Config ringbuffer */
+ rv_writel(I2S_BT_TX_MEM_WINDOW_START,
+ rtd->acp3x_base + mmACP_BT_TX_RINGBUFADDR);
+ rv_writel(MAX_BUFFER, rtd->acp3x_base +
+ mmACP_BT_TX_RINGBUFSIZE);
+ rv_writel(DMA_SIZE,
+ rtd->acp3x_base + mmACP_BT_TX_DMA_SIZE);
+
+ /* Config audio fifo */
+ acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
+ BT_PB_FIFO_ADDR_OFFSET;
+ rv_writel(acp_fifo_addr,
+ rtd->acp3x_base + mmACP_BT_TX_FIFOADDR);
+ rv_writel(FIFO_SIZE,
+ rtd->acp3x_base + mmACP_BT_TX_FIFOSIZE);
+ /* Enable watermark/period interrupt to host */
+ rv_writel(BIT(BT_TX_THRESHOLD),
+ rtd->acp3x_base + mmACP_EXTERNAL_INTR_CNTL);
+ break;
+
+ case I2S_SP_INSTANCE:
+ default:
+ /* Config ringbuffer */
+ rv_writel(I2S_SP_TX_MEM_WINDOW_START,
+ rtd->acp3x_base + mmACP_I2S_TX_RINGBUFADDR);
+ rv_writel(MAX_BUFFER,
+ rtd->acp3x_base + mmACP_I2S_TX_RINGBUFSIZE);
+ rv_writel(DMA_SIZE,
+ rtd->acp3x_base + mmACP_I2S_TX_DMA_SIZE);
+
+ /* Config audio fifo */
+ acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
+ SP_PB_FIFO_ADDR_OFFSET;
+ rv_writel(acp_fifo_addr,
+ rtd->acp3x_base + mmACP_I2S_TX_FIFOADDR);
+ rv_writel(FIFO_SIZE,
+ rtd->acp3x_base + mmACP_I2S_TX_FIFOSIZE);
+ /* Enable watermark/period interrupt to host */
+ rv_writel(BIT(I2S_TX_THRESHOLD),
+ rtd->acp3x_base + mmACP_EXTERNAL_INTR_CNTL);
+ }
} else {
- /* Config ringbuffer */
- rv_writel(MEM_WINDOW_START + MAX_BUFFER, rtd->acp3x_base +
- mmACP_BT_RX_RINGBUFADDR);
- rv_writel(MAX_BUFFER, rtd->acp3x_base +
- mmACP_BT_RX_RINGBUFSIZE);
- rv_writel(DMA_SIZE, rtd->acp3x_base + mmACP_BT_RX_DMA_SIZE);
-
- /* Config audio fifo */
- acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
- (rtd->num_pages * 8) + CAPTURE_FIFO_ADDR_OFFSET;
- rv_writel(acp_fifo_addr, rtd->acp3x_base +
- mmACP_BT_RX_FIFOADDR);
- rv_writel(FIFO_SIZE, rtd->acp3x_base + mmACP_BT_RX_FIFOSIZE);
+ switch (rtd->i2s_instance) {
+ case I2S_BT_INSTANCE:
+ /* Config ringbuffer */
+ rv_writel(I2S_BT_RX_MEM_WINDOW_START,
+ rtd->acp3x_base + mmACP_BT_RX_RINGBUFADDR);
+ rv_writel(MAX_BUFFER,
+ rtd->acp3x_base + mmACP_BT_RX_RINGBUFSIZE);
+ rv_writel(DMA_SIZE,
+ rtd->acp3x_base + mmACP_BT_RX_DMA_SIZE);
+
+ /* Config audio fifo */
+ acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
+ BT_CAPT_FIFO_ADDR_OFFSET;
+ rv_writel(acp_fifo_addr,
+ rtd->acp3x_base + mmACP_BT_RX_FIFOADDR);
+ rv_writel(FIFO_SIZE,
+ rtd->acp3x_base + mmACP_BT_RX_FIFOSIZE);
+ /* Enable watermark/period interrupt to host */
+ rv_writel(BIT(BT_RX_THRESHOLD),
+ rtd->acp3x_base + mmACP_EXTERNAL_INTR_CNTL);
+ break;
+
+ case I2S_SP_INSTANCE:
+ default:
+ /* Config ringbuffer */
+ rv_writel(I2S_SP_RX_MEM_WINDOW_START,
+ rtd->acp3x_base + mmACP_I2S_RX_RINGBUFADDR);
+ rv_writel(MAX_BUFFER,
+ rtd->acp3x_base + mmACP_I2S_RX_RINGBUFSIZE);
+ rv_writel(DMA_SIZE,
+ rtd->acp3x_base + mmACP_I2S_RX_DMA_SIZE);
+
+ /* Config audio fifo */
+ acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
+ SP_CAPT_FIFO_ADDR_OFFSET;
+ rv_writel(acp_fifo_addr,
+ rtd->acp3x_base + mmACP_I2S_RX_FIFOADDR);
+ rv_writel(FIFO_SIZE,
+ rtd->acp3x_base + mmACP_I2S_RX_FIFOSIZE);
+ /* Enable watermark/period interrupt to host */
+ rv_writel(BIT(I2S_RX_THRESHOLD),
+ rtd->acp3x_base + mmACP_EXTERNAL_INTR_CNTL);
+ }
}
- /* Enable watermark/period interrupt to host */
- rv_writel(BIT(BT_TX_THRESHOLD) | BIT(BT_RX_THRESHOLD),
- rtd->acp3x_base + mmACP_EXTERNAL_INTR_CNTL);
}
static int acp3x_dma_open(struct snd_pcm_substream *substream)
@@ -264,13 +352,14 @@ static int acp3x_dma_open(struct snd_pcm_substream *substream)
struct snd_pcm_runtime *runtime = substream->runtime;
struct snd_soc_pcm_runtime *prtd = substream->private_data;
struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd,
- DRV_NAME);
+ DRV_NAME);
struct i2s_dev_data *adata = dev_get_drvdata(component->dev);
- struct i2s_stream_instance *i2s_data = kzalloc(sizeof(struct i2s_stream_instance),
- GFP_KERNEL);
+ struct i2s_stream_instance *i2s_data =
+ kzalloc(sizeof(struct i2s_stream_instance),
+ GFP_KERNEL);
if (!i2s_data)
- return -EINVAL;
+ return -ENOMEM;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
runtime->hw = acp3x_pcm_hardware_playback;
@@ -278,55 +367,52 @@ static int acp3x_dma_open(struct snd_pcm_substream *substream)
runtime->hw = acp3x_pcm_hardware_capture;
ret = snd_pcm_hw_constraint_integer(runtime,
- SNDRV_PCM_HW_PARAM_PERIODS);
+ SNDRV_PCM_HW_PARAM_PERIODS);
if (ret < 0) {
dev_err(component->dev, "set integer constraint failed\n");
kfree(i2s_data);
return ret;
}
- if (!adata->play_stream && !adata->capture_stream)
+ if (!adata->play_stream && !adata->capture_stream &&
+ adata->i2ssp_play_stream && !adata->i2ssp_capture_stream)
rv_writel(1, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
adata->play_stream = substream;
- else
+ adata->i2ssp_play_stream = substream;
+ } else {
adata->capture_stream = substream;
+ adata->i2ssp_capture_stream = substream;
+ }
i2s_data->acp3x_base = adata->acp3x_base;
runtime->private_data = i2s_data;
return 0;
}
-static u64 acp_get_byte_count(struct i2s_stream_instance *rtd, int direction)
-{
- u64 byte_count;
-
- if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
- byte_count = rv_readl(rtd->acp3x_base +
- mmACP_BT_TX_LINEARPOSITIONCNTR_HIGH);
- byte_count |= rv_readl(rtd->acp3x_base +
- mmACP_BT_TX_LINEARPOSITIONCNTR_LOW);
- } else {
- byte_count = rv_readl(rtd->acp3x_base +
- mmACP_BT_RX_LINEARPOSITIONCNTR_HIGH);
- byte_count |= rv_readl(rtd->acp3x_base +
- mmACP_BT_RX_LINEARPOSITIONCNTR_LOW);
- }
- return byte_count;
-}
-
static int acp3x_dma_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params)
+ struct snd_pcm_hw_params *params)
{
int status;
- u64 size;
- struct snd_pcm_runtime *runtime = substream->runtime;
- struct i2s_stream_instance *rtd = runtime->private_data;
+ uint64_t size;
+ struct snd_soc_pcm_runtime *prtd = substream->private_data;
+ struct snd_soc_card *card = prtd->card;
+ struct acp3x_platform_info *pinfo = snd_soc_card_get_drvdata(card);
+ struct i2s_stream_instance *rtd = substream->runtime->private_data;
if (!rtd)
return -EINVAL;
+
+ if (pinfo) {
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ rtd->i2s_instance = pinfo->play_i2s_instance;
+ else
+ rtd->i2s_instance = pinfo->cap_i2s_instance;
+ } else
+ pr_err("pinfo failed\n");
+
size = params_buffer_bytes(params);
status = snd_pcm_lib_malloc_pages(substream, size);
if (status < 0)
@@ -349,11 +435,20 @@ static snd_pcm_uframes_t acp3x_dma_pointer(struct snd_pcm_substream *substream)
u32 pos = 0;
u32 buffersize = 0;
u64 bytescount = 0;
- struct i2s_stream_instance *rtd =
- substream->runtime->private_data;
+ struct snd_soc_pcm_runtime *prtd = substream->private_data;
+ struct snd_soc_card *card = prtd->card;
+ struct acp3x_platform_info *pinfo = snd_soc_card_get_drvdata(card);
+ struct i2s_stream_instance *rtd = substream->runtime->private_data;
+
+ if (pinfo) {
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ rtd->i2s_instance = pinfo->play_i2s_instance;
+ else
+ rtd->i2s_instance = pinfo->cap_i2s_instance;
+ }
buffersize = frames_to_bytes(substream->runtime,
- substream->runtime->buffer_size);
+ substream->runtime->buffer_size);
bytescount = acp_get_byte_count(rtd, substream->stream);
if (bytescount > rtd->bytescount)
bytescount -= rtd->bytescount;
@@ -364,10 +459,13 @@ static snd_pcm_uframes_t acp3x_dma_pointer(struct snd_pcm_substream *substream)
static int acp3x_dma_new(struct snd_soc_pcm_runtime *rtd)
{
struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd,
- DRV_NAME);
+ DRV_NAME);
struct device *parent = component->dev->parent;
- snd_pcm_lib_preallocate_pages_for_all(rtd->pcm, SNDRV_DMA_TYPE_DEV,
- parent, MIN_BUFFER, MAX_BUFFER);
+
+ snd_pcm_lib_preallocate_pages_for_all(rtd->pcm,
+ SNDRV_DMA_TYPE_DEV,
+ parent, MAX_BUFFER,
+ MAX_BUFFER);
return 0;
}
@@ -377,7 +475,7 @@ static int acp3x_dma_hw_free(struct snd_pcm_substream *substream)
}
static int acp3x_dma_mmap(struct snd_pcm_substream *substream,
- struct vm_area_struct *vma)
+ struct vm_area_struct *vma)
{
return snd_pcm_lib_default_mmap(substream, vma);
}
@@ -387,18 +485,22 @@ static int acp3x_dma_close(struct snd_pcm_substream *substream)
struct snd_soc_pcm_runtime *prtd = substream->private_data;
struct i2s_stream_instance *rtd = substream->runtime->private_data;
struct snd_soc_component *component = snd_soc_rtdcom_lookup(prtd,
- DRV_NAME);
+ DRV_NAME);
struct i2s_dev_data *adata = dev_get_drvdata(component->dev);
- if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
adata->play_stream = NULL;
- else
+ adata->i2ssp_play_stream = NULL;
+ } else {
adata->capture_stream = NULL;
+ adata->i2ssp_capture_stream = NULL;
+ }
/* Disable ACP irq, when the current stream is being closed and
* another stream is also not active.
*/
- if (!adata->play_stream && !adata->capture_stream)
+ if (!adata->play_stream && !adata->capture_stream &&
+ !adata->i2ssp_play_stream && !adata->i2ssp_capture_stream)
rv_writel(0, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
kfree(rtd);
return 0;
@@ -443,7 +545,7 @@ static int acp3x_audio_probe(struct platform_device *pdev)
}
adata->acp3x_base = devm_ioremap(&pdev->dev, res->start,
- resource_size(res));
+ resource_size(res));
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!res) {
@@ -454,6 +556,8 @@ static int acp3x_audio_probe(struct platform_device *pdev)
adata->i2s_irq = res->start;
adata->play_stream = NULL;
adata->capture_stream = NULL;
+ adata->i2ssp_play_stream = NULL;
+ adata->i2ssp_capture_stream = NULL;
dev_set_drvdata(&pdev->dev, adata);
/* Initialize ACP */
@@ -461,14 +565,14 @@ static int acp3x_audio_probe(struct platform_device *pdev)
if (status)
return -ENODEV;
status = devm_snd_soc_register_component(&pdev->dev,
- &acp3x_i2s_component,
- NULL, 0);
+ &acp3x_i2s_component,
+ NULL, 0);
if (status) {
dev_err(&pdev->dev, "Fail to register acp i2s component\n");
goto dev_err;
}
status = devm_request_irq(&pdev->dev, adata->i2s_irq, i2s_irq_handler,
- irqflags, "ACP3x_I2S_IRQ", adata);
+ irqflags, "ACP3x_I2S_IRQ", adata);
if (status) {
dev_err(&pdev->dev, "ACP3x I2S IRQ request failed\n");
goto dev_err;
@@ -518,13 +622,16 @@ static int acp3x_resume(struct device *dev)
adata->play_stream->runtime->private_data;
config_acp3x_dma(rtd, SNDRV_PCM_STREAM_PLAYBACK);
rv_writel((rtd->xfer_resolution << 3),
- rtd->acp3x_base + mmACP_BTTDM_ITER);
+ rtd->acp3x_base + mmACP_BTTDM_ITER);
+ val = rv_readl(rtd->acp3x_base + mmACP_I2STDM_ITER);
+ val = val | (rtd->xfer_resolution << 3);
+ rv_writel(val, rtd->acp3x_base + mmACP_I2STDM_ITER);
if (adata->tdm_mode == true) {
rv_writel(adata->tdm_fmt, adata->acp3x_base +
- mmACP_BTTDM_TXFRMT);
+ mmACP_BTTDM_TXFRMT);
val = rv_readl(adata->acp3x_base + mmACP_BTTDM_ITER);
rv_writel((val | 0x2), adata->acp3x_base +
- mmACP_BTTDM_ITER);
+ mmACP_BTTDM_ITER);
}
}
@@ -533,13 +640,17 @@ static int acp3x_resume(struct device *dev)
adata->capture_stream->runtime->private_data;
config_acp3x_dma(rtd, SNDRV_PCM_STREAM_CAPTURE);
rv_writel((rtd->xfer_resolution << 3),
- rtd->acp3x_base + mmACP_BTTDM_IRER);
+ rtd->acp3x_base + mmACP_BTTDM_IRER);
+ val = rv_readl(rtd->acp3x_base + mmACP_I2STDM_ITER);
+ val = val | (rtd->xfer_resolution << 3);
+ rv_writel(val, rtd->acp3x_base + mmACP_I2STDM_ITER);
+
if (adata->tdm_mode == true) {
rv_writel(adata->tdm_fmt, adata->acp3x_base +
- mmACP_BTTDM_RXFRMT);
+ mmACP_BTTDM_RXFRMT);
val = rv_readl(adata->acp3x_base + mmACP_BTTDM_IRER);
rv_writel((val | 0x2), adata->acp3x_base +
- mmACP_BTTDM_IRER);
+ mmACP_BTTDM_IRER);
}
}
diff --git a/sound/soc/amd/raven/acp3x.h b/sound/soc/amd/raven/acp3x.h
index 6bc38a4..d381b5c 100644
--- a/sound/soc/amd/raven/acp3x.h
+++ b/sound/soc/amd/raven/acp3x.h
@@ -7,6 +7,9 @@
#include "chip_offset_byte.h"
+#define I2S_SP_INSTANCE 0x01
+#define I2S_BT_INSTANCE 0x02
+
#define ACP3x_DEVS 3
#define ACP3x_PHY_BASE_ADDRESS 0x1240000
#define ACP3x_I2S_MODE 0
@@ -28,31 +31,47 @@
#define ACP3x_POWER_OFF_IN_PROGRESS 0x03
#define ACP3x_SOFT_RESET__SoftResetAudDone_MASK 0x00010001
-#define ACP_SRAM_PTE_OFFSET 0x02050000
-#define PAGE_SIZE_4K_ENABLE 0x2
-#define MEM_WINDOW_START 0x4000000
-#define PLAYBACK_FIFO_ADDR_OFFSET 0x400
-#define CAPTURE_FIFO_ADDR_OFFSET 0x500
+#define PAGE_SIZE_4K_ENABLE 0x02
+#define I2S_SP_TX_MEM_WINDOW_START 0x4000000
+#define I2S_SP_RX_MEM_WINDOW_START 0x4020000
+#define I2S_BT_TX_MEM_WINDOW_START 0x4040000
+#define I2S_BT_RX_MEM_WINDOW_START 0x4060000
+
+#define ACP_SRAM_PTE_OFFSET 0x02050000
+#define ACP_SRAM_SP_PB_PTE_OFFSET 0x0
+#define ACP_SRAM_SP_CP_PTE_OFFSET 0x100
+#define ACP_SRAM_BT_PB_PTE_OFFSET 0x200
+#define ACP_SRAM_BT_CP_PTE_OFFSET 0x300
+#define SP_PB_FIFO_ADDR_OFFSET 0x500
+#define SP_CAPT_FIFO_ADDR_OFFSET 0x700
+#define BT_PB_FIFO_ADDR_OFFSET 0x900
+#define BT_CAPT_FIFO_ADDR_OFFSET 0xB00
+
+
+#define SLOT_WIDTH_8 0x08
+#define SLOT_WIDTH_16 0x10
+#define SLOT_WIDTH_24 0x18
+#define SLOT_WIDTH_32 0x20
#define PLAYBACK_MIN_NUM_PERIODS 2
#define PLAYBACK_MAX_NUM_PERIODS 8
-#define PLAYBACK_MAX_PERIOD_SIZE 16384
-#define PLAYBACK_MIN_PERIOD_SIZE 4096
+#define PLAYBACK_MAX_PERIOD_SIZE 8192
+#define PLAYBACK_MIN_PERIOD_SIZE 1024
#define CAPTURE_MIN_NUM_PERIODS 2
#define CAPTURE_MAX_NUM_PERIODS 8
-#define CAPTURE_MAX_PERIOD_SIZE 16384
-#define CAPTURE_MIN_PERIOD_SIZE 4096
+#define CAPTURE_MAX_PERIOD_SIZE 8192
+#define CAPTURE_MIN_PERIOD_SIZE 1024
-#define MAX_BUFFER (PLAYBACK_MAX_PERIOD_SIZE * PLAYBACK_MAX_NUM_PERIODS)
-#define MIN_BUFFER MAX_BUFFER
-#define FIFO_SIZE 0x100
-#define DMA_SIZE 0x40
-#define FRM_LEN 0x100
+#define MAX_BUFFER (PLAYBACK_MAX_PERIOD_SIZE * PLAYBACK_MAX_NUM_PERIODS)
+#define MIN_BUFFER MAX_BUFFER
+#define FIFO_SIZE 0x100
+#define DMA_SIZE 0x40
+#define FRM_LEN 0x100
-#define SLOT_WIDTH_8 0x08
-#define SLOT_WIDTH_16 0x10
-#define SLOT_WIDTH_24 0x18
-#define SLOT_WIDTH_32 0x20
+#define SLOT_WIDTH_8 0x08
+#define SLOT_WIDTH_16 0x10
+#define SLOT_WIDTH_24 0x18
+#define SLOT_WIDTH_32 0x20
struct acp3x_platform_info {
u16 play_i2s_instance;
@@ -67,17 +86,24 @@ struct i2s_dev_data {
void __iomem *acp3x_base;
struct snd_pcm_substream *play_stream;
struct snd_pcm_substream *capture_stream;
+ struct snd_pcm_substream *i2ssp_play_stream;
+ struct snd_pcm_substream *i2ssp_capture_stream;
};
struct i2s_stream_instance {
u16 num_pages;
+ u16 i2s_instance;
+ u16 capture_channel;
+ u16 direction;
u16 channels;
u32 xfer_resolution;
- u64 bytescount;
+ u32 val;
dma_addr_t dma_addr;
+ u64 bytescount;
void __iomem *acp3x_base;
};
+
static inline u32 rv_readl(void __iomem *base_addr)
{
return readl(base_addr - ACP3x_PHY_BASE_ADDRESS);
@@ -87,3 +113,44 @@ static inline void rv_writel(u32 val, void __iomem *base_addr)
{
writel(val, base_addr - ACP3x_PHY_BASE_ADDRESS);
}
+
+static inline u64 acp_get_byte_count(struct i2s_stream_instance *rtd,
+ int direction)
+{
+ u64 byte_count;
+
+ if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
+ switch (rtd->i2s_instance) {
+ case I2S_BT_INSTANCE:
+ byte_count = rv_readl(rtd->acp3x_base +
+ mmACP_BT_TX_LINEARPOSITIONCNTR_HIGH);
+ byte_count |= rv_readl(rtd->acp3x_base +
+ mmACP_BT_TX_LINEARPOSITIONCNTR_LOW);
+ break;
+ case I2S_SP_INSTANCE:
+ default:
+ byte_count = rv_readl(rtd->acp3x_base +
+ mmACP_I2S_TX_LINEARPOSITIONCNTR_HIGH);
+ byte_count |= rv_readl(rtd->acp3x_base +
+ mmACP_I2S_TX_LINEARPOSITIONCNTR_LOW);
+ }
+
+ } else {
+ switch (rtd->i2s_instance) {
+ case I2S_BT_INSTANCE:
+ byte_count = rv_readl(rtd->acp3x_base +
+ mmACP_BT_RX_LINEARPOSITIONCNTR_HIGH);
+ byte_count |= rv_readl(rtd->acp3x_base +
+ mmACP_BT_RX_LINEARPOSITIONCNTR_LOW);
+ break;
+ case I2S_SP_INSTANCE:
+ default:
+ byte_count = rv_readl(rtd->acp3x_base +
+ mmACP_I2S_RX_LINEARPOSITIONCNTR_HIGH);
+ byte_count |= rv_readl(rtd->acp3x_base +
+ mmACP_I2S_RX_LINEARPOSITIONCNTR_LOW);
+ }
+ }
+ return byte_count;
+}
+
--
2.7.4
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