On 23/09/2019 17:20, Ben Dooks wrote: > From: Edward Cragg <edward.cragg@xxxxxxxxxxxxxxx> > > Add a callback to configure TDM settings for the Tegra30 I2S ASoC 'platform' > driver. > > Signed-off-by: Edward Cragg <edward.cragg@xxxxxxxxxxxxxxx> > [ben.dooks@xxxxxxxxxxxxxxx: merge fix for power management] > [ben.dooks@xxxxxxxxxxxxxxx: add review change for fsync of 1 clock] > Signed-off-by: Ben Dooks <ben.dooks@xxxxxxxxxxxxxxx> > --- > sound/soc/tegra/tegra30_i2s.c | 33 +++++++++++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/sound/soc/tegra/tegra30_i2s.c b/sound/soc/tegra/tegra30_i2s.c > index ac6983c6bd72..dfed60adbeba 100644 > --- a/sound/soc/tegra/tegra30_i2s.c > +++ b/sound/soc/tegra/tegra30_i2s.c > @@ -254,6 +254,38 @@ static int tegra30_i2s_trigger(struct snd_pcm_substream *substream, int cmd, > return 0; > } > > +/* > + * Set up TDM > + */ > +static int tegra30_i2s_set_tdm(struct snd_soc_dai *dai, > + unsigned int tx_mask, unsigned int rx_mask, > + int slots, int slot_width) > +{ > + struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai); > + unsigned int mask, val; > + > + dev_dbg(dai->dev, "%s: txmask=0x%08x rxmask=0x%08x slots=%d width=%d\n", > + __func__, tx_mask, rx_mask, slots, slot_width); > + > + /* Set up slots and tx/rx masks */ > + mask = TEGRA30_I2S_SLOT_CTRL_TOTAL_SLOTS_MASK | > + TEGRA30_I2S_SLOT_CTRL_RX_SLOT_ENABLES_MASK | > + TEGRA30_I2S_SLOT_CTRL_TX_SLOT_ENABLES_MASK; > + > + val = (tx_mask << TEGRA30_I2S_SLOT_CTRL_TX_SLOT_ENABLES_SHIFT) | > + (rx_mask << TEGRA30_I2S_SLOT_CTRL_RX_SLOT_ENABLES_SHIFT) | > + ((slots - 1) << TEGRA30_I2S_SLOT_CTRL_TOTAL_SLOTS_SHIFT); > + > + pm_runtime_get_sync(dai->dev); > + regmap_update_bits(i2s->regmap, TEGRA30_I2S_SLOT_CTRL, mask, val); > + regmap_update_bits(i2s->regmap, TEGRA30_I2S_CH_CTRL, > + TEGRA30_I2S_CH_CTRL_FSYNC_WIDTH_MASK, > + (1 - 1) << TEGRA30_I2S_CH_CTRL_FSYNC_WIDTH_SHIFT); So this is just 0, so it would be simpler just to write 0. Feel free to add a comment. Cheers Jon -- nvpublic _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx https://mailman.alsa-project.org/mailman/listinfo/alsa-devel