On 17/09/2019 19:12, Ben Dooks wrote: > If the CIF is not configured as 16 or 8 bit, then the > packing for 8/16 bits should not be enabled as the > hardware only supports 8 or 16 bit packing. > > Signed-off-by: Ben Dooks <ben.dooks@xxxxxxxxxxxxxxx> > --- > sound/soc/tegra/tegra30_ahub.c | 29 +++++++++++++++++++++-------- > 1 file changed, 21 insertions(+), 8 deletions(-) > > diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c > index 58e05ceb86da..c2f2e29dd32e 100644 > --- a/sound/soc/tegra/tegra30_ahub.c > +++ b/sound/soc/tegra/tegra30_ahub.c > @@ -96,10 +96,17 @@ int tegra30_ahub_setup_rx_fifo(enum tegra30_ahub_rxcif rxcif, > (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE); > val = tegra30_apbif_read(reg); > val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_MASK | > - TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK); > - val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT) | > - TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN | > - TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16; > + TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK | > + TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN); > + val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT); > + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 || > + cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8) > + val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN; > + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16) > + val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16; > + if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8) > + val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_8_4; > + Ah maybe this is what I am missing from the previous patch. So the last patch was a preparatory patch for this one. Sameer, how is this handled in the case of Tegra210? Cheers Jon -- nvpublic _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx https://mailman.alsa-project.org/mailman/listinfo/alsa-devel
