On Fri, Sep 06, 2019 at 12:46:24PM -0700, Curtis Malainey wrote: > From: Ben Zhang <benzh@xxxxxxxxxxxx> > > Instead of clearing RT5677_PWR_ANLG2 (MX-64h) to 0 at SND_SOC_BIAS_OFF, > we only clear the RT5677_PWR_CORE bit which is set at SND_SOC_BIAS_PREPARE. > MICBIAS control bits are left unchanged. This is a bug fix so should have been at the start of the series rather than depending on the naming changes you had as patch 1.
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