On Fri, Jul 26, 2019 at 10:33:29AM +0000, Codrin.Ciubotariu@xxxxxxxxxxxxx wrote: > On 25.07.2019 21:24, mirq-linux@xxxxxxxxxxxx wrote: > > On Thu, Jul 25, 2019 at 03:02:34PM +0000, Codrin.Ciubotariu@xxxxxxxxxxxxx wrote: > >> On 22.07.2019 21:27, Michał Mirosław wrote: > >>> SSC driver allows only synchronous TX and RX. In slave mode for BCLK > >>> it uses only one of TK or RK pin, but for LRCLK it configured separate > >>> inputs from TF and RF pins. Allow configuration with common FS signal. > > [...] > >>> @@ -613,10 +607,30 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream, > >>> return -EINVAL; > >>> } > >>> > >>> - if (!atmel_ssc_cfs(ssc_p)) { > >>> + if (atmel_ssc_cfs(ssc_p)) { > >>> + /* > >>> + * SSC provides LRCLK > >>> + * > >>> + * Both TF and RF are generated, so use them directly. > >>> + */ > >>> + rcmr |= SSC_BF(RCMR_START, fs_edge); > >>> + tcmr |= SSC_BF(TCMR_START, fs_edge); > >>> + } else { > >>> fslen = fslen_ext = 0; > >>> rcmr_period = tcmr_period = 0; > >>> fs_osync = SSC_FSOS_NONE; > >>> + if (!ssc->shared_fs_pin) { > >>> + rcmr |= SSC_BF(RCMR_START, fs_edge); > >>> + tcmr |= SSC_BF(TCMR_START, fs_edge); > >>> + } else if (ssc->clk_from_rk_pin) { > >>> + /* assume RF is to be used when RK is used as BCLK input */ > >>> + /* Note: won't work correctly on SAMA5D2 due to errata */ > >>> + rcmr |= SSC_BF(RCMR_START, fs_edge); > >>> + tcmr |= SSC_BF(TCMR_START, SSC_START_RECEIVE); > >> > >> Did you find a platform in which this mode works? > > > > To be exact: according to the errata, TX is delayed improperly. So if you > > use only RX (SSC side receives) direction, you're fine. > > I know, but there are other platforms with SSC, which don't have this > errata, like sam9x35 or sama5d3. Have you tested this mode, RK input, RF > input, RD starts on edge detect, TF input, TD starts synchronously with > receiver? No, I have only SAMA5D2 available to test. Best Regards, Michał Mirosław _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx https://mailman.alsa-project.org/mailman/listinfo/alsa-devel