On Mon, Jul 22, 2019 at 3:58 PM Lucas Stach <l.stach@xxxxxxxxxxxxxx> wrote: > > Am Montag, den 22.07.2019, 15:48 +0300 schrieb Daniel Baluta: > > SAI supports up to 8 Rx/Tx data lines which can be enabled > > using TCE/RCE bits of TCR3/RCR3 registers. > > > > Data lines to be enabled are read from DT fsl,dl_mask property. > > By default (if no DT entry is provided) only data line 0 is enabled. > > > > Note: > > We can only enable consecutive data lines starting with data line #0. > > Why is the property a bitmask then? To me this sounds like we want to > have the number of lanes in the DT and convert to the bitmask inside > the driver. Actually my comment might be wrong. I have read the documentation again and it seems that: We can only enable consecutive data lines *ONLY* if combine mode is enabled. Thus, if combine mode is disabled we can independently enable any data line. I will clarify this with IP owner and correct the patch accordingly. > > > > Signed-off-by: Daniel Baluta <daniel.baluta@xxxxxxx> > > --- > > sound/soc/fsl/fsl_sai.c | 10 +++++++++- > > sound/soc/fsl/fsl_sai.h | 6 ++++-- > > 2 files changed, 13 insertions(+), 3 deletions(-) > > > > diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c > > index 768341608695..d0fa02188b7c 100644 > > --- a/sound/soc/fsl/fsl_sai.c > > +++ b/sound/soc/fsl/fsl_sai.c > > @@ -601,7 +601,7 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream, > > > > > regmap_update_bits(sai->regmap, FSL_SAI_xCR3(tx), > > > FSL_SAI_CR3_TRCE_MASK, > > > - FSL_SAI_CR3_TRCE); > > > + FSL_SAI_CR3_TRCE(sai->soc_data->dl_mask[tx]); > > > > > ret = snd_pcm_hw_constraint_list(substream->runtime, 0, > > > SNDRV_PCM_HW_PARAM_RATE, &fsl_sai_rate_constraints); > > @@ -887,6 +887,14 @@ static int fsl_sai_probe(struct platform_device *pdev) > > > } > > > } > > > > > + /* active data lines mask for TX/RX, defaults to 1 (only the first > > > + * data line is enabled > > + */ > > Comment style not in line with Linux coding style. Will fix. Thanks Lucas for review. Should be like this, right? /* * comment */ checkpatch.pl warned me only about the end of the comment :). _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx https://mailman.alsa-project.org/mailman/listinfo/alsa-devel
