From: Cezary Rojewski <cezary.rojewski@xxxxxxxxx>
HW recommends to set DUM bit on device power up, so that DPIB write
request occurs every frame regardless of whether DPIB has changed or
not. This addresses incorrect position reporting for capture streams.
Signed-off-by: Leoni Prodduvaka <leoni.prodduvaka@xxxxxxxxx>
Signed-off-by: Cezary Rojewski <cezary.rojewski@xxxxxxxxx>
---
sound/soc/intel/skylake/skl.c | 21 +++++++++++++++++++++
sound/soc/intel/skylake/skl.h | 1 +
2 files changed, 22 insertions(+)
diff --git a/sound/soc/intel/skylake/skl.c b/sound/soc/intel/skylake/skl.c
index f864f7b3df3a..7174b5da4099 100644
--- a/sound/soc/intel/skylake/skl.c
+++ b/sound/soc/intel/skylake/skl.c
@@ -192,6 +192,25 @@ void skl_update_d0i3c(struct device *dev, bool enable)
snd_hdac_chip_readb(bus, VS_D0I3C));
}
+/**
+ * skl_dum_set - set DUM bit in EM2 register
+ * @bus: HD-audio core bus
+ *
+ * Addresses incorrect position reporting for capture streams.
+ * Used on device power up.
+ */
+static void skl_dum_set(struct hdac_bus *bus)
+{
+ /* For the DUM bit to be set, CRST needs to be out of reset state */
+ if (!(snd_hdac_chip_readb(bus, GCTL) & AZX_GCTL_RESET)) {
+ skl_enable_miscbdcge(bus->dev, false);
+ snd_hdac_bus_exit_link_reset(bus);
+ skl_enable_miscbdcge(bus->dev, true);
+ }
+
+ snd_hdac_chip_updatel(bus, VS_EM2, AZX_VS_EM2_DUM, AZX_VS_EM2_DUM);
+}
+
/* called from IRQ */
static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr)
{
@@ -299,6 +318,7 @@ static int _skl_resume(struct hdac_bus *bus)
struct skl *skl = bus_to_skl(bus);
skl_init_pci(skl);
+ skl_dum_set(bus);
skl_init_chip(bus, true);
return skl_resume_dsp(skl);
@@ -956,6 +976,7 @@ static int skl_first_init(struct hdac_bus *bus)
/* initialize chip */
skl_init_pci(skl);
+ skl_dum_set(bus);
return skl_init_chip(bus, true);
}
diff --git a/sound/soc/intel/skylake/skl.h b/sound/soc/intel/skylake/skl.h
index 85f8bb6687dc..b92a7f8fe675 100644
--- a/sound/soc/intel/skylake/skl.h
+++ b/sound/soc/intel/skylake/skl.h
@@ -46,6 +46,7 @@
#define DMA_TRANSMITION_START 2
#define DMA_TRANSMITION_STOP 3
+#define AZX_VS_EM2_DUM BIT(23)
#define AZX_REG_VS_EM2_L1SEN BIT(13)
struct skl_dsp_resource {
--
2.17.1
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