On 3/28/19 6:08 PM, Andy Shevchenko wrote:
On Thu, Mar 28, 2019 at 02:21:47PM -0400, Pierre-Louis Bossart wrote:
+#if IS_ENABLED(CONFIG_SND_SOC_SOF_EDISON)
Can we use Merrifield / mrfld instead of EDISON in entire series?
we could, but I don't know of any other platform than Edison to run the
code. I know it's less accurate from an architecture perspective but felt
Merrifield was confusing for non-Intel folks.
We use Merrifield across the entire kernel. It would be confusing other way around.
So, please, change it to be consistent with the rest of the kernel.
Since this is the only comment so far, I'll add a follow-up patch.
And one more question, is there any howto to run a nocodec variant of SOF on
Intel Merrifield platform?
I haven't had time to look into this with the slew of comments on v3/v4 and
travel. If you have a working Edison setup with 5.0+, then this should work
as is.
Where to get SOF binary, and more interesting where to get sources and howto
compile them into binary?
the main issue is going to describe the SSP2 pins with ACPI ASL stuff
to make sure they are in 3.3V and the right pinmux, that's the part that I
keep kicking down the road. When I used Edison with the official built there
was a 'simple' script for the pin-mux, if you have the moral equivalent in
ASL I am all ears
I don't know what should be done and where, the pins themselves are in correct
mode set by firmware (if no-one touches them as GPIOs):
pin 75 (GP40_I2S_2_CLK) mode 1 0x00003221
pin 76 (GP41_I2S_2_FS) mode 1 0x00003221
pin 77 (GP42_I2S_2_RXD) mode 1 0x00003221
pin 78 (GP43_I2S_2_TXD) mode 1 0x00003221
If you talking about Edison/Arduino board and its discrete pin control, we have
a mechanism to set it from ASL.
yep, that's the board I have.
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