> On Mar 21, 2019, at 8:12 AM, Mark Brown <broonie@xxxxxxxxxx> wrote: > > On Wed, Mar 20, 2019 at 07:38:45PM -0700, Annaliese McDermond wrote: >> Model and manage the on-board PLL as a component in the Core >> Clock Framework. This should allow us to do some more complex >> clock management and power control. Also, some of the >> on-board chip clocks can be exposed to the outside, and this >> change will make those clocks easier to consume by other >> parts of the kernel. > > This doesn't apply against current code, please check and resend: > > Applying: ASoC: tlv320aic32x4: Model PLL in CCF > Using index info to reconstruct a base tree... > M sound/soc/codecs/Kconfig > M sound/soc/codecs/Makefile > error: patch failed: sound/soc/codecs/tlv320aic32x4.c:722 > error: sound/soc/codecs/tlv320aic32x4.c: patch does not apply > error: Did you hand edit your patch? > It does not apply to blobs recorded in its index. > > I also had to apply the first patch for -next since it seems to depend > on other changes, like you said it's not a super important fix so that's > no big deal. That’s funny. I just checked and I’m rebased against for-next. The patches are generated with git prepare-patch. They’re applying on top of e390c46faf. > _______________________________________________ > Alsa-devel mailing list > Alsa-devel@xxxxxxxxxxxxxxxx > https://mailman.alsa-project.org/mailman/listinfo/alsa-devel -- Annaliese McDermond nh6z@xxxxxxxx _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx https://mailman.alsa-project.org/mailman/listinfo/alsa-devel
