On Tue, Feb 19, 2019 at 04:29:28PM +0000, Codrin.Ciubotariu@xxxxxxxxxxxxx wrote:
> The ADCs are sleeping when the SLEEP bit is set and running when it's
> cleared, so the bit should be inverted.
> Tested on pcm1863.
This definitely seems to be the case from the datasheet but...
> @@ -184,8 +184,8 @@ static const struct snd_soc_dapm_widget pcm1865_dapm_widgets[] = {
> * Put the codec into SLEEP mode when not in use, allowing the
> * Energysense mechanism to operate.
> */
> - SND_SOC_DAPM_ADC("ADC1", "HiFi Capture 1", PCM186X_POWER_CTRL, 1, 0),
> - SND_SOC_DAPM_ADC("ADC2", "HiFi Capture 2", PCM186X_POWER_CTRL, 1, 0),
> + SND_SOC_DAPM_ADC("ADC1", "HiFi Capture 1", PCM186X_POWER_CTRL, 1, 1),
> + SND_SOC_DAPM_ADC("ADC2", "HiFi Capture 2", PCM186X_POWER_CTRL, 1, 1),
> };
...we still have a bug on pcm1865 as we've got the same register bit for
both channels which isn't something that's supposed to happen. Looking
at the register description this feels like it'd be better handled in
set_bias_level() or as a DAPM supply widget. However that's already an
issue without this patch. I am a bit curious how this ever worked for
anyone though.
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