On Fri, Dec 21, 2018 at 11:58:31AM +0000, Mark Brown wrote:
> On Fri, Dec 21, 2018 at 11:52:27AM +0000, Charles Keepax wrote:
> > On Wed, Dec 19, 2018 at 09:11:15PM +0100, Michał Mirosław wrote:
>
> > > + if (!wm8904->fll_fout) {
> > > + int ret = wm8904_set_fll(component, WM8904_FLL_MCLK, WM8904_FLL_MCLK,
> > > + clk_get_rate(wm8904->mclk), 12288000);
> > > + if (ret)
> > > + return ret;
> > > + }
>
> > What is your thinking on selecting a 12.28MHz clock? Will this
> > not cause issues with say 44.1k playback?
> The driver just shouldn't be making decisions like this at all, either
> generic code or a machine driver should do so.
Sorry, I forgot about the hardcoded frequency. I'll have to rethink this
patch.
Will you take the other three patches as is, or should I resend the series?
Best Regards,
Michał Mirosław
_______________________________________________
Alsa-devel mailing list
Alsa-devel@xxxxxxxxxxxxxxxx
http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
