Hi Jiada, On 12/03/2018 01:24 PM, jiada_wang@xxxxxxxxxx wrote: > From: Jiada Wang <jiada_wang@xxxxxxxxxx> > > This patch adds clock ID for renesas adg clocks > > Signed-off-by: Jiada Wang <jiada_wang@xxxxxxxxxx> > --- > include/dt-bindings/clock/renesas-adg.h | 11 +++++++++++ > 1 file changed, 11 insertions(+) > create mode 100644 include/dt-bindings/clock/renesas-adg.h > > diff --git a/include/dt-bindings/clock/renesas-adg.h b/include/dt-bindings/clock/renesas-adg.h > new file mode 100644 > index 000000000000..fe30c186cef7 > --- /dev/null > +++ b/include/dt-bindings/clock/renesas-adg.h > @@ -0,0 +1,11 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (C) 2018 Mentor Graphics inc. > + */ > +#ifndef __DT_BINDINGS_RENESAS_ADG_H__ > +#define __DT_BINDINGS_RENESAS_ADG_H__ > + > +#define ADG_FIX 0 > +#define ADG_AVB 1 > + > +#endif /* __DT_BINDINGS_RENESAS_ADG_H__ */ > instead of adding these trivial definitions in a new header file with no potential for further extension, I would like to ask you to write a proper device tree bindings documentation section and describe the clock ids as a list of acceptable values for a cell. -- Best wishes, Vladimir _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
