Oops,
the subject got a bit out of hand after rephrasing... I'll fix that up
for v2.
- Péter
On 2018-02-12 16:06, Peter Ujfalusi wrote:
> In the reset state of the codec we do not have complete playback or capture
> routes.
>
> The audio playback/capture will not work due to missing clock signals on
> the I2S bus if PLL, MDAC/NDAC/DAC MADC/NADC/ADC is powered down.
>
> To make sure that even if all output/input is disconnected the codec is
> generating clocks, we need to have valid DAPM route in every case to power
> up the must needed parts of the codec.
>
> I have verified that switching DAC (during playback) or ADC (during
> capture) will stop the I2S clocks, so the only solution is to connect the
> 'Off' routes as well to output/input.
>
> Tested on am43x-epos-evm with aic3111 codec in master mode.
>
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@xxxxxx>
> ---
> sound/soc/codecs/tlv320aic31xx.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c
> index 858cb8be445f..d42a23eb916e 100644
> --- a/sound/soc/codecs/tlv320aic31xx.c
> +++ b/sound/soc/codecs/tlv320aic31xx.c
> @@ -586,9 +586,11 @@ common31xx_audio_map[] = {
> {"DAC Left Input", "Left Data", "DAC IN"},
> {"DAC Left Input", "Right Data", "DAC IN"},
> {"DAC Left Input", "Mono", "DAC IN"},
> + {"DAC Left Input", "Off", "DAC IN"},
> {"DAC Right Input", "Left Data", "DAC IN"},
> {"DAC Right Input", "Right Data", "DAC IN"},
> {"DAC Right Input", "Mono", "DAC IN"},
> + {"DAC Right Input", "Off", "DAC IN"},
> {"DAC Left", NULL, "DAC Left Input"},
> {"DAC Right", NULL, "DAC Right Input"},
>
> @@ -601,6 +603,9 @@ common31xx_audio_map[] = {
> {"HP Right", "Switch", "Output Right"},
> {"HPR Driver", NULL, "HP Right"},
> {"HPR", NULL, "HPR Driver"},
> +
> + {"HPL", NULL, "DAC Left"},
> + {"HPR", NULL, "DAC Right"},
> };
>
> static const struct snd_soc_dapm_route
> @@ -621,16 +626,20 @@ aic31xx_audio_map[] = {
> {"MIC1LP P-Terminal", "FFR 10 Ohm", "MIC1LP"},
> {"MIC1LP P-Terminal", "FFR 20 Ohm", "MIC1LP"},
> {"MIC1LP P-Terminal", "FFR 40 Ohm", "MIC1LP"},
> + {"MIC1LP P-Terminal", "Off", "MIC1LP"},
> {"MIC1RP P-Terminal", "FFR 10 Ohm", "MIC1RP"},
> {"MIC1RP P-Terminal", "FFR 20 Ohm", "MIC1RP"},
> {"MIC1RP P-Terminal", "FFR 40 Ohm", "MIC1RP"},
> + {"MIC1RP P-Terminal", "Off", "MIC1RP"},
> {"MIC1LM P-Terminal", "FFR 10 Ohm", "MIC1LM"},
> {"MIC1LM P-Terminal", "FFR 20 Ohm", "MIC1LM"},
> {"MIC1LM P-Terminal", "FFR 40 Ohm", "MIC1LM"},
> + {"MIC1LM P-Terminal", "Off", "MIC1LM"},
>
> {"MIC1LM M-Terminal", "FFR 10 Ohm", "MIC1LM"},
> {"MIC1LM M-Terminal", "FFR 20 Ohm", "MIC1LM"},
> {"MIC1LM M-Terminal", "FFR 40 Ohm", "MIC1LM"},
> + {"MIC1LM M-Terminal", "Off", "MIC1LM"},
>
> {"MIC_GAIN_CTL", NULL, "MIC1LP P-Terminal"},
> {"MIC_GAIN_CTL", NULL, "MIC1RP P-Terminal"},
>
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