On Mon, Aug 28, 2017 at 04:30:53PM -0700, Ryan Lee wrote: > + if ((max98927->iface == SND_SOC_DAIFMT_DSP_A) || > + (max98927->iface == SND_SOC_DAIFMT_DSP_B)) > + return 0; > + > + /* BCLK configuration */ Why do we not configure the BCLK in DSP modes? That's unusual and seems likely to break some systems that rely on exact clocking. Also if we're selecting on format a switch statement is generally better to make any further special casing easier in future.
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