> -----Original Message----- > From: alsa-devel-bounces@xxxxxxxxxxxxxxxx [mailto:alsa-devel- > bounces@xxxxxxxxxxxxxxxx] On Behalf Of Yang, Libin > Sent: Tuesday, March 7, 2017 11:50 AM > To: alsa-devel@xxxxxxxxxxxxxxxx; tiwai@xxxxxxx > Cc: Yang, Libin <libin.yang@xxxxxxxxx>; Lin, Mengdong > <mengdong.lin@xxxxxxxxx>; infernix@xxxxxxxxxxxx > Subject: [PATCH] ALSA: hda - set intel audio clock to a properly > value > > From: Libin Yang <libin.yang@xxxxxxxxx> > > On some Intel platforms, the audio clock may not be set correctly with initial > setting. This will cause the audio playback/capture rates wrong. > > This patch checks the audio clock setting and will set it to a properly value if it > is not set correct. > > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=188411 > > Signed-off-by: Libin Yang <libin.yang@xxxxxxxxx> > --- > include/sound/hda_register.h | 12 +++-- > sound/hda/ext/hdac_ext_controller.c | 6 +-- > sound/pci/hda/hda_intel.c | 91 > +++++++++++++++++++++++++++++++++++++ > 3 files changed, 103 insertions(+), 6 deletions(-) > > diff --git a/include/sound/hda_register.h b/include/sound/hda_register.h > index 0013063..7ea16cb 100644 > --- a/include/sound/hda_register.h > +++ b/include/sound/hda_register.h > @@ -227,6 +227,8 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, > SDO3 }; > #define AZX_REG_PPLCLLPU 0xC > > /* registers for Multiple Links Capability Structure */ > +/* Multiple Links Capability */ > +#define AZX_REG_ML_CAP_BASE 0xc00 Base is already available as part of bus, use bus->mlcap > +#define AZX_REG_ML_LCAPx(x) (AZX_REG_ML_CAP_BASE + (0x40 + > 0x40 * x)) > +#define AZX_REG_ML_LCTLx(x) (AZX_REG_ML_CAP_BASE + (0x44 + > 0x40 * x)) This is specific to the had legacy driver as only link0 is used, I think this can be moved to driver As define. If it required to use all the link, then need to use ext functions to initialize the address per link. > +#define ML_LCTL_SCF_MASK 0xF > +#define AZX_MLCTL_SPA (0x1 << 16) > +#define AZX_MLCTL_CPA (0x1 << 23) > +#define AZX_MLCTL_SPA_SHIFT 16 > +#define AZX_MLCTL_CPA_SHIFT 23 > > + > static void hda_intel_init_chip(struct azx *chip, bool full_reset) { > struct hdac_bus *bus = azx_bus(chip); > @@ -564,6 +652,9 @@ static void hda_intel_init_chip(struct azx *chip, bool > full_reset) > + > + if (IS_SKL_PLUS(pci)) > + intel_init_lctl(chip); Use bus->mlcap to check for multilink capability is present. _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
