>-----Original Message----- >From: alsa-devel-bounces@xxxxxxxxxxxxxxxx [mailto:alsa-devel-bounces@alsa- >project.org] On Behalf Of Takashi Iwai >Sent: Friday, February 10, 2017 12:59 AM >To: alsa-devel@xxxxxxxxxxxxxxxx >Cc: Ian W MORRISON <ianwmorrison@xxxxxxxxx>; Pierre-Louis Bossart ><pierre-louis.bossart@xxxxxxxxxxxxxxx>; Anand, Jerome ><jerome.anand@xxxxxxxxx> >Subject: Re: [PATCH 0/6] Yet another experiments with LPE audio > >On Tue, 07 Feb 2017 16:44:12 +0100, >Takashi Iwai wrote: >> >> On Tue, 07 Feb 2017 14:11:16 +0100, >> Takashi Iwai wrote: >> > >> > Another day, another patchset. Here I put a largish cleanup patch to >> > just shuffle the code, in addition to the new S16 and S32 formats >> > support and the support for a single period with no period wakeup as >> > we've discussed in the previous thread. One patch to remove BATCH >> > flag is same and kept in the middle of this series. >> > >> > I guess I can merge the first three patches now. >> >> It turned out that S16 and S32 causes xrun with dmix by some reason. >> Still investigating, but we can postpone these, too. > >And this gave some interesting result. At first I thought this being >a bug in the kernel driver. Then I found out that this is no kernel >driver bug but some performance problem of dmix code, appearing only >when accessing uncached pages on Cherrytrail. (The same issue may >happen likely on other Atom platforms, but need to check.) > >By using a generic dmix code with semaphore, this performance problem >is resolved. So, S16/S32 supports are OK in the end. > >But this leads to another question wrt the kernel driver code: >why the driver allocates / maps with uncached page, not with write- >combined? Pierre, Jerome, any clue? > In CHT and BYT the organization of the hardware fabric is such that the HDMI DMA transactions are not snooped and so it will fetch data only from DDR. In most non-atom platforms it is snooped, and so fabric will return data from cache if it is updated. In the past we faced problem where the DMA was fetching some old data because cache was not flushed into DDR. That's where we marked the pages as uncached. _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
