On 01/23, Pierre-Louis Bossart wrote: > From: Irina Tirdea <irina.tirdea@xxxxxxxxx> > > The BayTrail and CherryTrail platforms provide platform clocks > through their Power Management Controller (PMC). > > The SoC supports up to 6 clocks (PMC_PLT_CLK[0..5]) with a > frequency of either 19.2 MHz (PLL) or 25 MHz (XTAL) for BayTrail > and a frequency of 19.2 MHz (XTAL) for CherryTrail. These clocks > are available for general system use, where appropriate, and each > have Control & Frequency register fields associated with them. > > Port from legacy by Pierre Bossart, integration in clock framework > by Irina Tirdea > > Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@xxxxxxxxxxxxxxx> > Signed-off-by: Irina Tirdea <irina.tirdea@xxxxxxxxx> > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
