From: Jörg Krause <jk@xxxxxxxxxx>
The SAIF base oversample rates are either 512*fs or 384*fs. An additional
divider exists within the SAIF to generate sub-multiples of these two base
rates if MCLK is required by the codec.
* The sub-rates for the 512x base rate are: 256x, 128x, 64x, and 32x.
* The sub-rates for the 384x base rate are: 192x, 96x, and 48x.
Setting the base rate depending on the modulo operation with 32 and 48
give wrong results for some mclk.
If mclk=18.432MHz both modulo operations results in 0. As testing the
result with 32 is done first, a wrong base rate of 512*fs is set instead
of the correct 384*fs.
Fix this by setting the base rate depending on the calculated sub-rate.
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
---
sound/soc/mxs/mxs-saif.c | 24 +++++++++++++++++-------
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c
index 13631003cb7c..1e724533dc6e 100644
--- a/sound/soc/mxs/mxs-saif.c
+++ b/sound/soc/mxs/mxs-saif.c
@@ -119,23 +119,33 @@ static int mxs_saif_set_clk(struct mxs_saif *saif,
* Set SAIF clock
*
* The SAIF clock should be either 384*fs or 512*fs.
- * If MCLK is used, the SAIF clk ratio need to match mclk ratio.
- * For 32x mclk, set saif clk as 512*fs.
- * For 48x mclk, set saif clk as 384*fs.
+ * If MCLK is used, the SAIF clk ratio needs to match mclk ratio.
+ * For 256x, 128x, 64x, and 32x sub-rates, set saif clk as 512*fs.
+ * For 192x, 96x, and 48x sub-rates, set saif clk as 384*fs.
*
* If MCLK is not used, we just set saif clk to 512*fs.
*/
clk_prepare_enable(master_saif->clk);
if (master_saif->mclk_in_use) {
- if (mclk % 32 == 0) {
+ switch (mclk / rate) {
+ case 32:
+ case 64:
+ case 128:
+ case 256:
+ case 512:
scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE;
ret = clk_set_rate(master_saif->clk, 512 * rate);
- } else if (mclk % 48 == 0) {
+ break;
+ case 48:
+ case 96:
+ case 192:
+ case 384:
scr |= BM_SAIF_CTRL_BITCLK_BASE_RATE;
ret = clk_set_rate(master_saif->clk, 384 * rate);
- } else {
- /* SAIF MCLK should be either 32x or 48x */
+ break;
+ default:
+ /* SAIF MCLK should be a sub-rate of 512x or 384x */
clk_disable_unprepare(master_saif->clk);
return -EINVAL;
}
--
2.11.0
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