Re: [question] Sample rate IC followed by DAC

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On 06/11/16 22:21, Clemens Ladisch wrote:
Matt Flax wrote:
On 04/11/16 22:31, Clemens Ladisch wrote:
Matt Flax wrote:
I have a sample rate converter IC, which is followed by a DAC. This kind of setup :

SoC chip -> Sample rate conv. chip -> DAC chip
What is the purpose of the converter?  What problem does it solve?
It has a lower noise floor then libsamplerate.
Which chip is better than 145 dB?
The AK4137EQ is better. However it also offloads the processing to hardware.
How do you construct a machine driver for this setup ?
The original DAC driver will not work correctly, as far as sample rate
settings are concerned.
Yes, I was expecting that. Tell me, even in the current ALSA version, is there
any support for sample rate converter hardware chains ?
No.

Well, if your goal isn't a proper driver for upstream, just hack the
existing DAC driver to access the other I²C device, when needed.

Sure, I can do this. I can't find any examples on operating a codec within
a codec. Would I export all function symbols and do it that way ?
Export to where?  You would just modify the existing DAC driver.
OK, will do, thanks for the guidance.

Regards,
Clemens

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