On Fri, Aug 19, 2016 at 07:17:16PM +0200, Sylwester Nawrocki wrote:
> This patch adds handling of the CODEC's external MCLK{1,2} clocks
> needed for board configurations where these clocks are not always on
> oscillators.
> The 32k source MCLKn clock is basically kept permanently enabled while
> the other MCLKn clock is being gated in the MFD's runtime suspend/resume
> callbacks.
>
> Signed-off-by: Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx>
> ---
> I'm not sure it's a correct approach hence only an RFC patch.
> ---
Yeah I am not sure this is quite the correct approach, there are
quite a few corner cases that would not be covered well here. For
example an internally divided down 32k in which case both the 32k
and MCLK would come from the same pin, or using the 32k to feed
an FLL in which case we are trying to enable MCLK1 unnecessarily.
I think we could request the 32k clock source from this part
of the code, but without implementing clock drivers for the
chips internal clocking I think the main MCLK would need to be
requested from the machine driver for now.
On that note, I have been working on a patch chain that adds an
actual clock driver for the chip unfortunately this has been
delayed somewhat due to issues interfacing SPI backed clocks to
the clock framework. Krzysztof Kozlowski has sent a series that
appears to resolve these issues for me so hopefully once the
clock guys have had a look at that I can send my clock driver.
My current implementation mostly just implements the 32k clock
but we can start building that out to include the SYSCLKs and
FLLs etc. fairly quickly. The best thing might be to wait for
that and then build additional features onto that.
Let me know if you want to get an early look at that code.
Thanks,
Charles
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