Hello, I have a couple of questions/comments regarding the da7213 driver in mainline: (1) the da7213 driver enables mclk in BIAS_SUSPEND, so essentially the clock is always running (since idle_bias_off is not set); at least on my platform, clk_set_rate() fails when the clock is already enabled (2) da7213's srm_en variable is redundant and can be removed (3) for 32 kHz PLL mode (DAI master), section 13.28 of the datasheet indicates that PLL_SRM_EN should be asserted; the da7213 drivers goesn't (4) is only S16_LE actually supported? #define DA7213_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) but in da7213_set_dai_fmt() we have /* By default only 32 BCLK per WCLK is supported */ dai_clk_mode |= DA7213_DAI_BCLKS_PER_WCLK_32; thanks, regards, p. -- Peter Meerwald-Stadler +43-664-2444418 (mobile) _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
