On Tue, May 3, 2016 at 5:24 AM, Fabio Estevam <festevam@xxxxxxxxx> wrote: > On Tue, May 3, 2016 at 9:14 AM, Arnaud Mouiche > <arnaud.mouiche@xxxxxxxxxxx> wrote: >> Happened when the Playback (or Capture) is running continuously >> and Capture (or Playback) is restarted (xrun, manual stop/start...) >> >> Since the RX (or TX) FIFO are only reset when the whole SSI is disabled, >> pending samples from previous capture (or playback) session may still >> be present. They must be erased to not introduce channel slipping. >> >> FIFO Clear register fields are documented in IMX51, IMX35 reference manual. >> They are not documented in IMX50 or IMX6 RM, despite they are >> working as expected on IMX6SL and IMX6solo. >> >> Signed-off-by: Arnaud Mouiche <arnaud.mouiche@xxxxxxxxxxx> > > Reviewed-by: Fabio Estevam <fabio.estevam@xxxxxxx> Tested-by: Caleb Crome <caleb@xxxxxxxxx> _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
