On Tue, May 3, 2016 at 9:13 AM, Arnaud Mouiche <arnaud.mouiche@xxxxxxxxxxx> wrote: > Previously, SCR.SSIEN and SCR.TE were enabled at once if no capture > stream was also running. > This may not give a chance for the DMA to write the first sample in > TX FIFO before the streaming starts on the PCM bus, inserting void > samples first. > Those void samples are then responsible for slipping the channels. > > Signed-off-by: Arnaud Mouiche <arnaud.mouiche@xxxxxxxxxxx> Reviewed-by: Fabio Estevam <fabio.estevam@xxxxxxx> _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
