Hi Fabio,
On 02/05/16 15:17, Fabio Estevam wrote:
Hi Petr,
I can get audio with mainline now, but it plays with an incorrect pitch.
Here is a quick hack to allow MCLK to be driven:
--- a/arch/arm/mach-imx/mach-imx6ul.c
+++ b/arch/arm/mach-imx/mach-imx6ul.c
@@ -22,9 +22,12 @@ static void __init imx6ul_enet_clk_init(void)
struct regmap *gpr;
gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
- if (!IS_ERR(gpr))
+ if (!IS_ERR(gpr)) {
regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR,
IMX6UL_GPR1_ENET_CLK_OUTPUT);
+ regmap_update_bits(gpr, IOMUXC_GPR1, (1 << 20), (1 << 20));
+
+ }
else
pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
Cool, now my board plays too! Thanks!
As next steps we need:
1. Fix the sound pitch
Mine plays at the correct speed. For the correct speed the clock
assignment from the Freescale DTS needs to be copied, so that the SAI2
clock generates 12.288MHz.
Below are the relevant nodes from my DTS:
&clks {
assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
assigned-clock-rates = <786432000>;
};
&sai2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2>;
assigned-clocks = <&clks IMX6UL_CLK_SAI2_SEL>,
<&clks IMX6UL_CLK_SAI2>;
assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
assigned-clock-rates = <0>, <12288000>;
status = "okay";
};
2. Find a proper way to enable MCLK.
I would tend to put the control of the SAIx_MCLK_DIR into the SAI driver
and if needed add an extra boolean property like "enable-mclk-output".
Leaving it independent makes not much sense, for binding to the
clock/pinmux it's too generic and the Freescale solution with a gpr phandle
isn't very lucky either as it forces the use of the fsl soundcard and
doesn't allow e.g. the simple-audio-card.
But let's see what else the Freescale or ALSA developers suggest.
Cheers
Petr
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