Hey, its posted for others, but I am unsubscribing to the list, so
future correspondence should be direct to email.
On Mon, Feb 8, 2016 at 7:53 AM, Erik Friesen <friesendrywall@xxxxxxxxx> wrote:
> I find that the codec is getting a write failure at sgtl5000_fill_defaults at
>
> { SGTL5000_CHIP_ANA_POWER, 0x7060 },
>
> about half the time following a software reboot, and with external
> vddd powered with 1.8v. Reading this register shows that it is
> already at 0x7060, so I am not sure what is up with that, but I would
> suspect a hardware bug in the codec.
>
> Using this code has fixed this so far.
>
> static int sgtl5000_fill_defaults(struct sgtl5000_priv *sgtl5000)
> {
> int i, ret, val, index;
> int reg;
> for (i = 0; i < ARRAY_SIZE(sgtl5000_reg_defaults); i++) {
> val = sgtl5000_reg_defaults[i].def;
> index = sgtl5000_reg_defaults[i].reg;
> ret = regmap_read(sgtl5000->regmap, index, ®);
> if (ret) {
> printk(KERN_WARNING "SGTL5000 probe read failed at %i\n", i);
> return ret;
> }
> if (reg != val) {
> ret = regmap_write(sgtl5000->regmap, index, val);
> }
> if (ret) {
> printk(KERN_WARNING "SGTL5000 probe write failed %x at %i index %i
> @ %x\n", val, i, index, reg);
> return ret;
> }
> }
> return 0;
> }
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