Re: [PATCH] ASoC: rt5677: Reconfigure PLL1 after resume

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> -----Original Message-----
> From: Mark Brown [mailto:broonie@xxxxxxxxxx]
> Sent: Thursday, December 17, 2015 3:21 AM
> To: Ben Zhang
> Cc: alsa-devel@xxxxxxxxxxxxxxxx; Liam Girdwood; Bard Liao; Oder Chiou;
> John Lin; Dylan Reid; Anatol Pomozov
> Subject: Re: [PATCH] ASoC: rt5677: Reconfigure PLL1 after resume
> 
> On Tue, Dec 15, 2015 at 01:51:25PM -0800, Ben Zhang wrote:
> > Sometimes PLL1 stops working if the codec loses power during suspend
> > (when pow-ldo2 or reset gpio is used).
> > MX-7Bh(RT5677_PLL1_CTRL2) is cleared and won't be restored by
> regcache
> > since it's volatile. MX-7Bh has one status bit and M code for PLL1.
> > rt5677_set_dai_pll doesn't reconfigure
> > PLL1 after resume because it thinks the PLL params are not changed.
> 
> > This patch clears the cached PLL params at resume so that
> > rt5677_set_dai_pll can reconfigure the PLL after resume.
> 
> This is something I'd expect the machine driver to handle - if it's stopped
> using the PLL I'd expect it to explicitly turn it off, suspend (or the CODEC
> going idle for that matter normally, the PLL is burning
> power) should do that.  If anything I'd expect the CODEC driver to restore
> the current settings.

The main reason of this patch is MX-7Bh(RT5677_PLL1_CTRL2) is volatile.
However, the status bit of MX-7Bh is currently not used by codec driver.
So, it should be no problem if we set it non-volatile.

> 
> That said I'll apply this since it at least doesn't make things worse.

Can we revert it and resend a patch?

> 
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