Re: fsl_ssi.c: Getting channel slips with fsl_ssi.c in TDM (network) mode.

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On Wed, Oct 28, 2015 at 6:59 AM, Caleb Crome <caleb@xxxxxxxxx> wrote:
> On Wed, Oct 28, 2015 at 1:11 AM, Roberto Fichera <kernel@xxxxxxxxxxxxx> wrote:
>> On 10/27/2015 07:57 PM, Fabio Estevam wrote:
>>> [Adding Roberto in the thread as he is also trying to get SSI TDM support/
>>
>> Thanks Fabio,
>>
>> I'm also having the same issue but employing SSI in TDM master mode against a SLIC Si32178
>> using its PCM mode. PCLK is at 2048KHz, FSYNC is 8KHz slot length is 32 bits (SSI wants
>> this since when in master mode) but valid data set to be 8bits in the SSI register.
>>
>> My Current situation is that I've a custom fsl_ssi.c driver to control the SSI in TDM master mode
>> both PCLK and FSYNC works perfectly fine, the SLIC has a register that I can check via SPI for
>> such purpose, I can see the clocking status from its side. The main problem I've is exactly the same
>> Caleb is having, after a certain amount of SDMA transfers, roughly 1000 or so, everything stops
>> without any apparent reason.
>
> My problem is that the channels randomly slip a slot and all words end
> up in the wrong slot.  I suspect this is a DMA issue, but I really
> haven't diagnosed it yet.  I don't get a full stop on the data.
>
> FYI, I'm using a very recent 4.3 kernel from linus's repo, but 4.2
> behaved the same.
>

Now I'm recalling when I tried the patches on 4.1, everything
definitely froze.  What kernel are you using?.  I'm basically using
the 4.3-rc7

-Caleb
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