I neglected to include this line from dmesg hda-intel: IRQ timing workaround is activated for card #1. Suggest a bigger bdl_pos_adj. I don''t know if that is related or not. _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
