Am Donnerstag, 14. Oktober 2010, 13:16:12 schrieb Daniel Mack: > On Thu, Oct 14, 2010 at 01:01:52PM +0200, Julian Scheel wrote: > > Am Donnerstag, 14. Oktober 2010, 12:48:55 schrieb Daniel Mack: > > > On Thu, Oct 14, 2010 at 12:27:38PM +0200, Julian Scheel wrote: > > > > thanks a lot! You made my day (c: > > > > Using EP5 for feedback makes it working. So I now get the data out > > > > even in async mode. Currently I have a problem left that channel > > > > assignment jumps here and then. Probably a buffering issue... > > > > Also neither a SRC4192 (sample rate converter) nor a PCM1794 (dac) > > > > seem to be able to understand what I am sending right now... Not > > > > sure why. Looking at the measurements it really looks like a proper > > > > I2S signal. > > > > > > Can you send oscilloscope screenshots? Which data format are you using? > > > > Sure, attached you see a capture while running speaker-test to generate a > > 1khz sine wave on one channel. (Blue: BCLK 1,536MHz, Yellow: LRCLK: > > 48kHz, Green: I2S data) > > If you want to see more/other captures just let me know what you need. > > The dump doesn't show whether the LRCLK is symmetrical, iow, whether the > low phase of LRCLK has the same number of BCLK cycles as the high phase. > > But if that's the case, the signals do indeed look alright. Maybe you > need the configure the codec to this format? LRCLK is symmetrical. I use the modules from twistedpearaudio (http://www.twistedpearaudio.com/digital/metronome.aspx, http://www.twistedpearaudio.com/digital/cod.aspx) because this saved me some time designing a PCB for now... They are configured through DIP switches - and I think correctly. For the SRC the settings are: OWL0,1,2: 0, 0, 0 OFMT0,1: 1, 0 MODE0,1,2: 1, 0, 0 IFMT0,1,2: 1, 0, 0 BYPASS: 0 LGRP: 0 What I am actually wondering about is, that the SRC produces some output even when the input is null. Attached is a picture of this case. I did not measure the BCLK this time. Regards, Julian
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