Re: [PATCH] ASoC: WM8804: Power down the PLL correctly

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On Mon, 2010-10-04 at 09:37 +0100, Dimitris Papastamos wrote:
> The PLL is disabled when the corresponding bit is set not the other
> way around.  This commit depends on my other commit with Subject
> "ASoC: WM8804: Refactor set_pll code to avoid GCC warnings".
> 
> Signed-off-by: Dimitris Papastamos <dp@xxxxxxxxxxxxxxxxxxxxxxxxxxx>

Acked-by: Liam Girdwood <lrg@xxxxxxxxxxxxxxx>
-- 
Freelance Developer, SlimLogic Ltd
ASoC and Voltage Regulator Maintainer.
http://www.slimlogic.co.uk

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