On Tue, 14 Sep 2010 13:04:58 +0100 Mark Brown <broonie@xxxxxxxxxxxxxxxxxxxxxxxxxxx> wrote: > On Tue, Sep 14, 2010 at 02:54:49PM +0300, Jarkko Nikula wrote: > > Complete the phasing out of aic3x_read_reg_cache, aic3x_write_reg_cache, > > aic3x_read and aic3x_write calls. > > > > This patch replaces the aic3x_read with codec->hw_read that points to a > > function implemented by soc-cache. There is no need to cache the value from > > chip since the functions using aic3x_read are interested only read-only > > bits. > > > > Signed-off-by: Jarkko Nikula <jhnikula@xxxxxxxxx> > > It'd be a bit nicer to do this by using snd_soc_read() here also and > marking the registers as volatile. This makes the process much less > error prone since users can just use snd_soc_read() and the register > cache code will work out if it needs to go to the chip or not. Actually I looked that but problem with aic3x is that most of the volatile bits are with r/w configuration bits in the same registers. There are a few completely volatile read-only registers but currently there is no use for them. -- Jarkko _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
