В сообщении от 27 июня 2010 13:10:54 автор Mark Brown написал: > > Nope, it is not. Only i2c and clock related regs of uda1380 can be > > modified when there's no i2s clock, i.e. mixer regs should be updated > > right after i2s clock was enabled, so we marking mixer-related regs > > cache as dirty, to make sure they'll be updated when possible. > > This is very much non-obvious from your code - it really needs comments > explaining why the cache sync function didn't actually manage to sync > the cache. I'd also really expect that the dirtying of the cache would > be done when the operation that invalidates it happens, not later on > when restoring the cache. Otherwise there's a window where the cache is > flagged as valid but is not actually so which doesn't seem robust. Ok I'll add comments, but there's no window where cache is marked as valid but is no consistent with hardware - resume callback marks cache as dirty immediately :) > Old drivers for fairly obscure chips aren't always a good guide to best > practices for things. Ok, what driver should I use as reference? > > It's softreset and it's performed by writing some value to some reg. i2c > > xfers is not possible when codec is not enabled (it is not at this > > point) > > It needs to happen at some point. Softreset is performed right after codec power on, it can't be performed earlier.
Attachment:
signature.asc
Description: This is a digitally signed message part.
_______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
