On Fri, 9 Apr 2010, Oliver Neukum wrote: > Am Freitag, 9. April 2010 16:41:48 schrieb Alan Stern: > > > It'll work on x86. On incoherent architectures this violates the cacheline > > > rules for DMA-mapping if you have to bounce. > > > > Not true. Consider: The driver allocates a 16-byte buffer (xbuf) > > divided up into four sets of four bytes, and sets > > > > urb[i].transfer_buffer_dma = xbuf_dma + 4*i; > > > > Then usb_submit_urb(urb[i]) will copy the appropriate four bytes to a > > bounce buffer and map the bounce buffer. Accesses to the other parts > > of xbuf won't violate the cacheline rules, because xbuf isn't mapped > > for DMA -- only the bounce buffer is. When urb[i] completes, the > > bounce buffer contents will be copied back to the original four bytes > > in xbuf. Again, there is no violation of cacheline rules. > > I think you are assuming that either every or no part of the buffer is mapped > for DMA in place. I don't think you can assume that. Yes I can, because the code that makes this decision is part of usbcore and it is under my control. Alan Stern _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
