Hello,
On Thursday 24 September 2009 20:06:07 ext Rick Bronson wrote:
> Hi,
>
> I'm working on getting a WM8731 (in SLAVE) working using I2S on
> omap3 McBSP2 (in MASTER).
> static int omap3csb740_hw_params(struct snd_pcm_substream *substream,
> ...
> ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
> SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
> ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
> SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
> ret = snd_soc_dai_set_sysclk(codec_dai, 0, 12288000, SND_SOC_CLOCK_IN);
> ret = snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_SYSCLK_CLKS_EXT, 0,
> SND_SOC_CLOCK_IN);
I think the problem is here.
The MCBSP_CLKS pin is connected to CLK256FS pin of TWL4030 (or TPA).
Since you are not using the TWL codec, there will be no clock on the MCBSP_CLKS
pin, thus no functional clock for McBSP, thus no bits are shifted in or out.
You can try to use the internal functional clock:
ret = snd_soc_dai_set_sysclk(cpu_dai, OMAP_MCBSP_SYSCLK_CLKS_FCLK, 0,
SND_SOC_CLOCK_IN);
Than set the correct divider, which depends on the frequency you would like to
play. The source for the CLKS_FCLK is (in case of McBSP2) PER_96M_FCLK, so
96MHz. Now you have to divide this to get the correct value, as I recall quite a
long time ago there were some discussion about this here, and I have sent some
'formula' to calculate it, but I can not find it now :(
> ret = snd_soc_dai_set_clkdiv(cpu_dai, OMAP_MCBSP_CLKGDV, 256);
>
> Any help is greatly appreciated.
>
> Rick Bronson
>
--
Péter
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