On Sun, Aug 23, 2009 at 11:24:26AM +0200, Jarkko Nikula wrote:
> Commit ca6e2ce08679c094878d7f39a0349a7db1d13675 is setting up few XCCR and
> RCCR bits for I2S and DPS_A formats. Part of the bits are already set
> for all formats and I believe that XDISABLE and RDISABLE bits are
> format independent.
>
> As XCCR and RCCR are found only from OMAP2430 and OMAP34xx, I move setup
> of XDISABLE and RDISABLE to where those cpu's are tested and remove format
> dependent part for simplicity.
>
> Signed-off-by: Jarkko Nikula <jhnikula@xxxxxxxxx>
> Cc: Eero Nurkkala <ext-eero.nurkkala@xxxxxxxxx>
> Cc: Peter Ujfalusi <peter.ujfalusi@xxxxxxxxx>
Acked-by: Eduardo Valentin <eduardo.valentin@xxxxxxxxx>
> ---
> sound/soc/omap/omap-mcbsp.c | 8 ++------
> 1 files changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
> index f5387d9..89e8bce 100644
> --- a/sound/soc/omap/omap-mcbsp.c
> +++ b/sound/soc/omap/omap-mcbsp.c
> @@ -379,8 +379,8 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai,
> regs->xcr2 |= XFIG;
> }
> if (cpu_is_omap2430() || cpu_is_omap34xx()) {
> - regs->xccr = DXENDLY(1) | XDMAEN;
> - regs->rccr = RFULL_CYCLE | RDMAEN;
> + regs->xccr = DXENDLY(1) | XDMAEN | XDISABLE;
> + regs->rccr = RFULL_CYCLE | RDMAEN | RDISABLE;
> }
>
> switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
> @@ -388,15 +388,11 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai,
> /* 1-bit data delay */
> regs->rcr2 |= RDATDLY(1);
> regs->xcr2 |= XDATDLY(1);
> - regs->rccr |= RFULL_CYCLE | RDMAEN | RDISABLE;
> - regs->xccr |= (DXENDLY(1) | XDMAEN | XDISABLE);
> break;
> case SND_SOC_DAIFMT_DSP_A:
> /* 1-bit data delay */
> regs->rcr2 |= RDATDLY(1);
> regs->xcr2 |= XDATDLY(1);
> - regs->rccr |= RFULL_CYCLE | RDMAEN | RDISABLE;
> - regs->xccr |= (DXENDLY(1) | XDMAEN | XDISABLE);
> /* Invert FS polarity configuration */
> temp_fmt ^= SND_SOC_DAIFMT_NB_IF;
> break;
> --
> 1.6.3.3
>
> --
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--
Eduardo Valentin
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