On Thu, Aug 13, 2009 at 05:52:42PM +0800, Barry Song wrote: > Well. If all chips need this same operation, can it be abstracted to > the soc core layer? The details of the register cache operation are entirely in the domain of the chip - it's not mandatory to have a register cache at all and some devices have complex register layouts which cause problems with doing this in a fully automated fashion. There are also issues with some devices having things like soft reset registers in the middle of their register map. That said, there is some work in this direction - see soc-cache.c. _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
