On Fri, May 8, 2009 at 12:29 PM, Mark Brown <broonie@xxxxxxxxxxxxx> wrote: > On Fri, May 08, 2009 at 01:53:39AM +0200, Karl Beldan wrote: > >> Reset FIFO logic and registers, and make sure REC and RPL functions and >> FIFO service are disabled. > >> static int __init pxa2xx_i2s_init(void) >> { >> clk_i2s = ERR_PTR(-ENOENT); >> + >> + /* >> + * PXA Developer's Manual: >> + * If SACR0[ENB] is toggled in the middle of a normal operation, >> + * the SACR0[RST] bit must also be set and cleared to reset all >> + * I2S controller registers. >> + */ >> + SACR0 = SACR0_RST; >> + SACR0 = 0; >> + SACR1 = SACR1_DRPL | SACR1_DREC; >> + SAIMR &= ~(SAIMR_RFS | SAIMR_TFS); > > I'd expect this to happen when the driver is probed rather than when the > module is initialised. Otherwise we'll end up writing to the hardware Indeed, will resend. -- Karl _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel