On Fri, Feb 27, 2009 at 03:51:58PM -0600, Timur Tabi wrote: > > + /* set master/slave audio interface */ > > + switch (format & SND_SOC_DAIFMT_MASTER_MASK) { > > + case SND_SOC_DAIFMT_CBS_CFS: > > + cs4270->slave_mode = 1; > > + break; > > + case SND_SOC_DAIFMT_CBM_CFM: > > + cs4270->slave_mode = 0; > > + break; > > + case SND_SOC_DAIFMT_CBM_CFS: > > + /* unsupported - cs4270 can eigther be slave or master to > > Typo. However, I suggest you get rid of the "case > SND_SOC_DAIFMT_CBM_CFS" and in the "default:", just have this: > > > + default: > /* all other modes are unsupported by the hardware */ > > + ret = -EINVAL; > > + } > > + Ok, I'll post a patch for this. > > reg = snd_soc_read(codec, CS4270_MODE); > > reg &= ~(CS4270_MODE_SPEED_MASK | CS4270_MODE_DIV_MASK); > > - reg |= cs4270_mode_ratios[i].speed_mode | cs4270_mode_ratios[i].mclk; > > + reg |= cs4270_mode_ratios[i].mclk; > > + > > + if (cs4270->slave_mode) > > + reg |= CS4270_MODE_SLAVE; > > + else > > + reg |= cs4270_mode_ratios[i].speed_mode; > > Are you sure that the mclk bits are still correct in slave mode? I'm > looking at table 5 in the CS4270 manual, and it lists settings for > 1x,2x,4x speed even though the register is set to slave mode instead. Hmm - mclk bits are set with 'reg |= cs4270_mode_ratios[i].mclk;' unconditionally, and both speed flags are used when in slave mode. Don't see where you suspect a flaw here? Daniel _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel