On Fri, Jan 23, 2009 at 10:50:39AM -0600, Brian Rhodes wrote: > I'm curious if you think this problem may be arising from the toggling > of the direction of BCLK on the PXA while the I2S clock is enabled. I'm > sure there are people who have a reason for switching the bit clock > master, but I'm thinking that this should not be explicitly done if it > is not changing. Looking at the way the clock is enabled it looks like the hardware requires the clock to be enabled to write to the registers, though again I've not actually looked at the reference manual to check so this is idle speculation. Avoiding changing the register settings if they are already correct does seem like a reasonable thing to try, though. The ordering used when configuring may be worth looking at too. _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
