On Thu, Nov 13, 2008 at 04:40:03PM +0100, christian pellegrin wrote: > AFAIK it's limited to 2 transfers, one loaded and one running. It Yes, exactly - meaning that when DMA is idle there's only the loaded buffer. > could beneficial to have more of them (so the DMA doesn't stop if one > interrupt is delayed for too much time). But I don't know if it's so > critical. A period (4k) with cd quality sound takes 23 ms to be > played. An embedded system not responding to irqs for all this time > probably has worse issues. AIUI it's a bootstrapping issue: the problem is what happens when the first DMA buffer completes if there isn't a new buffer ready. Once there's a loaded buffer ready things are happy. I'm wondering if adding a call to s3c24xx_pcm_enqueue() in the start trigger after enabling the DMA might help matters, but I've not thought that through at all. _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
