On Mon, 2008-10-27 at 21:24 +0800, Richard Zhao wrote: > > Not quite, the clock is simply inverted compared to it's normal level. > > > > Well, what's the normal level? i2s LRCLK 's normal level is low for > frame start, but pcm's normal level is high for frame start. > > Different chips may have different meaning of "invert", because > "normal level" is not well defined. normal == standard. I2S spec is here :- http://www.nxp.com/acrobat_download/various/I2SBUS.pdf and is well defined. > SND_SOC_DAIFMT_NB_NF is a common > macro, so it cannot depend on any chip. So, could you please explain > in details what normal level and invert level of LRCLK/BCLK are in > i2s, pcm, left/right justified? > The wm8750 datasheet shows all this in diagrams :- http://www.wolfsonmicro.com/uploads/documents/WM8750.pdf It might be easier if you would send in your code so we can see what you are trying to accomplish. Liam _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
