Could someone explain this a little bit more pls? The comment at the top doesn't clarify it for me! Thanks in advance. /* * DAI hardware clock masters * This is wrt the codec, the inverse is true for the interface * i.e. if the codec is clk and frm master then the interface is * clk and frame slave. */ #define SND_SOC_DAIFMT_CBM_CFM (0 << 12) /* codec clk & frm master */ #define SND_SOC_DAIFMT_CBS_CFM (1 << 12) /* codec clk slave & frm master */ #define SND_SOC_DAIFMT_CBM_CFS (2 << 12) /* codec clk master & frame slave */ #define SND_SOC_DAIFMT_CBS_CFS (3 << 12) /* codec clk & frm slave */ _______________________________________________ Alsa-devel mailing list Alsa-devel@xxxxxxxxxxxxxxxx http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
