Add the Low Power Audio SubSystem Low Power Island (LPASS LPI)
pin controller device node required for audio subsystem on
Qualcomm QRB4210 RB2.
Signed-off-by: Alexey Klimov <alexey.klimov@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sm6115.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index c49aca3d0772..3a9fb1780c90 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -15,6 +15,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,apr.h>
+#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
#include <dt-bindings/thermal/thermal.h>
/ {
@@ -809,6 +810,21 @@ data-pins {
};
};
+ lpass_tlmm: pinctrl@a7c0000 {
+ compatible = "qcom,sm4250-lpass-lpi-pinctrl";
+ reg = <0x0 0xa7c0000 0x0 0x20000>,
+ <0x0 0xa950000 0x0 0x10000>;
+
+ clocks = <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
+ clock-names = "audio";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&lpass_tlmm 0 0 26>;
+
+ status = "disabled";
+ };
+
gcc: clock-controller@1400000 {
compatible = "qcom,gcc-sm6115";
reg = <0x0 0x01400000 0x0 0x1f0000>;
@@ -3068,6 +3084,9 @@ cpufreq_hw: cpufreq@f521000 {
};
};
+ sound: sound {
+ };
+
thermal-zones {
mapss-thermal {
polling-delay-passive = <0>;
--
2.45.2
