Add bindings about the PDM controller for the StarFive JH8100 SoC. Signed-off-by: Xingyu Wu <xingyu.wu@xxxxxxxxxxxxxxxx> --- .../bindings/sound/starfive,jh8100-pdm.yaml | 82 +++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/starfive,jh8100-pdm.yaml diff --git a/Documentation/devicetree/bindings/sound/starfive,jh8100-pdm.yaml b/Documentation/devicetree/bindings/sound/starfive,jh8100-pdm.yaml new file mode 100644 index 000000000000..50401e177f41 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/starfive,jh8100-pdm.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/starfive,jh8100-pdm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive JH8100 PDM controller + +description: | + The Pulse Density Modulation (PDM) controller is a digital PDM out + microphone interface controller and decoder that supports both up to 4 + channels, and an Inter-IC Sound (I2S) transmitter that outputs standard + stereo audio data to another device. The I2S transmitter can be + configured to operate either a master or a slave (default mode). The PDM + controller includes two PDM blocks, each PDM block can drive one + bitstream sampling clock and two bitstream coming data (mono/stereo) + with sampling clock rising and falling edge. + +maintainers: + - Xingyu Wu <xingyu.wu@xxxxxxxxxxxxxxxx> + - Walker Chen <walker.chen@xxxxxxxxxxxxxxxx> + +allOf: + - $ref: dai-common.yaml# + +properties: + compatible: + const: starfive,jh8100-pdm + + reg: + maxItems: 1 + + clocks: + items: + - description: DMIC output clock + - description: Main ICG clock + + clock-names: + items: + - const: dmic + - const: icg + + resets: + maxItems: 1 + + "#sound-dai-cells": + const: 0 + + starfive,syscon: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to System Register Controller sys_syscon_ne node. + - description: PDM source enabled control offset of SYS_SYSCON_NE register. + - description: PDM source enabled control mask + description: + The phandle to System Register Controller syscon node and the PDM source + from I2S enabled control offset and mask of SYS_SYSCON_NE register. + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - '#sound-dai-cells' + - starfive,syscon + +unevaluatedProperties: false + +examples: + - | + pdm@12250000 { + compatible = "starfive,jh8100-pdm"; + reg = <0x12250000 0x1000>; + clocks = <&syscrg_ne 142>, + <&syscrg_ne 171>; + clock-names = "dmic", "icg"; + resets = <&syscrg_ne 44>; + starfive,syscon = <&sys_syscon_ne 0xc 0xff>; + #sound-dai-cells = <0>; + }; -- 2.25.1
