Resulting from more reverse engineering in the course of debugging. Signed-off-by: Oswald Buddenhagen <oswald.buddenhagen@xxxxxx> --- include/sound/emu10k1.h | 28 ++++++++++++++++++---------- 1 file changed, 18 insertions(+), 10 deletions(-) diff --git a/include/sound/emu10k1.h b/include/sound/emu10k1.h index 9e3bd4f81460..12c7dc760724 100644 --- a/include/sound/emu10k1.h +++ b/include/sound/emu10k1.h @@ -598,17 +598,25 @@ SUB_REG(PEFE, FILTERAMOUNT, 0x000000ff) /* Filter envlope amount */ // In stereo mode, the two channels' caches are concatenated into one, // and hold the interleaved frames. // The cache holds 64 frames, so the upper half is not used in 8-bit mode. -// All registers mentioned below count in frames. -// The cache is a ring buffer; CCR_READADDRESS operates modulo 64. -// The cache is filled from (CCCA_CURRADDR - CCR_CACHEINVALIDSIZE) -// into (CCR_READADDRESS - CCR_CACHEINVALIDSIZE). +// All registers mentioned below count in frames. Shortcuts: +// CA = CCCA_CURRADDR, CRA = CCR_READADDRESS, +// CLA = CCR_CACHELOOPADDRHI:CLP_CACHELOOPADDR, +// CIS = CCR_CACHEINVALIDSIZE, LIS = CCR_LOOPINVALSIZE, +// CLF = CCR_CACHELOOPFLAG, LF = CCR_LOOPFLAG +// The cache is a ring buffer; CRA operates modulo 64. +// The cache is filled from (CA - CIS) into (CRA - CIS). // The engine has a fetch threshold of 32 bytes, so it tries to keep -// CCR_CACHEINVALIDSIZE below 8 (16-bit stereo), 16 (16-bit mono, -// 8-bit stereo), or 32 (8-bit mono). The actual transfers are pretty -// unpredictable, especially if several voices are running. -// Frames are consumed at CCR_READADDRESS, which is incremented afterwards, -// along with CCCA_CURRADDR and CCR_CACHEINVALIDSIZE. This implies that the -// actual playback position always lags CCCA_CURRADDR by exactly 64 frames. +// CIS below 8 (16-bit stereo), 16 (16-bit mono, 8-bit stereo), or +// 32 (8-bit mono). The actual transfers are pretty unpredictable, +// especially if several voices are running. +// Frames are consumed at CRA, which is incremented afterwards, +// along with CA and CIS. This implies that the actual playback +// position always lags CA by exactly 64 frames. +// When CA reaches DSL_LOOPENDADDR, LF is set for one frame's time. +// LF's rising edge causes the current values of CA and CIS to be +// copied into CLA and LIS, resp., and CLF to be set. +// If CLF is set, the first LIS of the CIS frames are instead +// filled from (CLA - LIS), and CLF is subsequently reset. #define CD0 0x20 /* Cache data registers 0 .. 0x1f */ #define PTB 0x40 /* Page table base register */ -- 2.42.0.419.g70bf8a5751
