On 9/5/23 3:05 PM, Cristian Ciocaltea wrote:
If I got it right, we should drop all write operations on PWR_CTRL1, and simply set the CS35L41_SYNC_EN_MASK bit in PWR_CTRL3.
That's a good point, it should be fixed implicitly by replacing the read/write operations with a single regmap_update_bits() call, which is protected by regmap's internal lock.
Yes, my recommendation is to replace the mdsync_up_sequence and completion handling with a single regmap_update_bits() call to set the CS35L41_SYNC_EN_MASK bit in PWR_CTRL3, which occurs in response to the PLL Lock interrupt.
Thanks, David
