On 29/08/2023 19:16, Alex Bee wrote:
> Currently there is only a SoC devicetree for RK3128 although RK312x
> SoC family consits of (at least) RK3126(C) and RK3128.
>
> This splits up the currently existing rk3128.dtsi in rk312x.dtsi which
> contains the common definitions for both SoCs and rk3128.dtsi, rk3126.dtsi
> respectivly.
typos here and before
>
> The differentiation between rk3126/rk3128 is already taken into account
> in the clock driver and they have their own compatibles.
> uart0 and i2c3 exist only in rk3128 SoC, thus they are moved to the new
> rk3128.dtsi.
>
> Signed-off-by: Alex Bee <knaerzche@xxxxxxxxx>
> ---
> arch/arm/boot/dts/rockchip/rk3126.dtsi | 9 +
> arch/arm/boot/dts/rockchip/rk3128.dtsi | 894 +------------------------
> arch/arm/boot/dts/rockchip/rk312x.dtsi | 893 ++++++++++++++++++++++++
Please generate your patches with proper -M/-B/-C arguments to detect
the rename/copy.
> 3 files changed, 909 insertions(+), 887 deletions(-)
> create mode 100644 arch/arm/boot/dts/rockchip/rk3126.dtsi
> create mode 100644 arch/arm/boot/dts/rockchip/rk312x.dtsi
>
> diff --git a/arch/arm/boot/dts/rockchip/rk3126.dtsi b/arch/arm/boot/dts/rockchip/rk3126.dtsi
> new file mode 100644
> index 000000000000..7345bd95d29d
> --- /dev/null
> +++ b/arch/arm/boot/dts/rockchip/rk3126.dtsi
> @@ -0,0 +1,9 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +
> +/dts-v1/;
> +
> +#include "rk312x.dtsi"
> +
> +/ {
> + compatible = "rockchip,rk3126";
> +};
> diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi
> index f3f0788195d2..4c5c9728179e 100644
> --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi
> +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi
> @@ -1,360 +1,11 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -/*
> - * (C) Copyright 2017 Rockchip Electronics Co., Ltd
> - */
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
This looks like relicensing, so without proper diff (see comment before)
it is a no-go.
>
> -#include <dt-bindings/clock/rk3128-cru.h>
> -#include <dt-bindings/gpio/gpio.h>
> -#include <dt-bindings/interrupt-controller/arm-gic.h>
> -#include <dt-bindings/interrupt-controller/irq.h>
> -#include <dt-bindings/pinctrl/rockchip.h>
> +/dts-v1/;
> +
> +#include "rk312x.dtsi"
>
> / {
> compatible = "rockchip,rk3128";
> - interrupt-parent = <&gic>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> -
> - arm-pmu {
> - compatible = "arm,cortex-a7-pmu";
> - interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
> - };
> -
> - cpus {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - cpu0: cpu@f00 {
> - device_type = "cpu";
> - compatible = "arm,cortex-a7";
> - reg = <0xf00>;
> - clock-latency = <40000>;
> - clocks = <&cru ARMCLK>;
> - operating-points = <
> - /* KHz uV */
> - 816000 1000000
> - >;
> - #cooling-cells = <2>; /* min followed by max */
> - };
All this patch is absolutely unreadable and unreviewable. Sorry, use the
tools to make review possible.
Best regards,
Krzysztof
