On Mon, Jul 03, 2023 at 09:16:06AM +0300, Maxim Kochetkov wrote: > On 22.06.2023 23:00, Maxim Kochetkov wrote: > > Depending on hardware implementaion of DWC I2S controller may support > > TDM mode if enabled in SoC at design time. > > Unfortunately there is no way to detect TDM capability for DWC by > > reading registers. Anyway, if such capability enabled, TDM mode > > can be enabled and configured by dai-tdm-slot-* DT options. > Do we need some extra steps to upstream this patch? We're in the merge window... Please don't send content free pings and please allow a reasonable time for review. People get busy, go on holiday, attend conferences and so on so unless there is some reason for urgency (like critical bug fixes) please allow at least a couple of weeks for review. If there have been review comments then people may be waiting for those to be addressed. Sending content free pings adds to the mail volume (if they are seen at all) which is often the problem and since they can't be reviewed directly if something has gone wrong you'll have to resend the patches anyway, so sending again is generally a better approach though there are some other maintainers who like them - if in doubt look at how patches for the subsystem are normally handled.
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