Re: [PATCH 0/2] ASoC: Use maple tree register cache for Everest Semi CODECs

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On Sat, 10 Jun 2023 12:16:36 +0100, Mark Brown wrote:
> Several of the Everest Semi CODECs only support single register read and
> write operations and therefore do not benefit from using the rbtree
> cache over the maple tree cache, convert them to the more modern maple
> tree cache.
> 
> 

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next

Thanks!

[1/2] ASoC: es8316: Use maple tree register cache
      commit: 7ae8039f87918e2f108d352f228e2ccee03994bc
[2/2] ASoC: es8328: Use maple tree register cache
      commit: 9321015a5f40891e7cb094c6f68f6d4f67b5f3dc

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark




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